MISRA Advisory Rule 2.5 states that a project should not contain unused
macro declarations.
While most of the violations in the nvgpu driver are due to unused
macros from hw headers, devinit-related headers, etc. there is a small
number that are due to things like:
* macros not being used when they could/should be
* macros in C files that are really not referenced
* CPP build flag mismatches
This change eliminates such violations from the following:
* replace constants with existing macros in timeout conversion code
* wrap nvgpu_gmmu_dbg macro #defines in #ifdef CONFIG_NVGPU_TRACE/#endif
* wrap MAX_MC_INTR_REGS #define in #ifdef CONFIG_NVGPU_NON_FUSA/#endif
* remove unused FECS_MAILBOX_0_ACK_RESTORE from runlist code
* wrap BACKTRACE_MAXSIZE macro with #ifndef _QNX_SOURCE/#endif
Jira NVGPU-3178
Change-Id: I2bc72f706d7af3f8e7b062126e8543d0dc8ac250
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284419
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Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
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GVS: Gerrit_Virtual_Submit
Xavier Chip Product POR was updated to 20G only. No more qual work
happening for 16G. So we do not plan to support 16G. Now that we have
a single speed left, remove the code added to support nvlink speed from
VBIOS as it is redundant.
JIRA NVGPU-2964
Change-Id: Icd71ebb8271240818e36d40bf73c60f0c5beb6bf
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284175
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-Created perf.h file and moved all private functions
and structures into it
-Created single sw_setup/pmu_setup for whole perf
unit
-Changed public function and structure names as per
standard format
-Deleted lpwr unit specific file from make file as
it is no longer used
-Removed support_vfe and support_changeseq flags as
it is no longer used
-Removed clk_set_boot_fll_clks_per_clk_domain function
as it is no longer used for tu10a
-Removed perf unit headers from pmuif folder
NVGPU-4448
Change-Id: Ia29e5b5a1a960b5474a929d8797542bf6c0eccf1
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283587
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Earlier, libnvgpu-drv.so and unit tests were being built with safety
debug profile unconditionally for all qnx and l4t builds.
In order to get coverage numbers corresponding to the release build
let us remove the overriding of the build profile for safety qnx
build. This also needs that these components are built only for
safety qnx and l4t builds.
For x86 and L4T userspace build, default profile is still set to
safety-debug.
JIRA NVGPU-4830
Change-Id: I02f572761bda9eb0c1b8fcdf7b22a07a9d10303a
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275764
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ACR ucode is encrypted using different keys for prod/dbg boards.
This change adds a check to select ACR ucode based on board type.
Note: This support is added only for t19x.
This patch also enables the prints "DEBUG MODE" indicative of board/
acr_ucode signature type and sctl and cpuctl reg values.
Bug 2350733
Bug 2672832
Bug 2672836
JIRA NVGPU-4001
Change-Id: I936b811b5836152206b11ec615ee75d201939968
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2268880
Reviewed-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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As a part of refactoring, we need to move the volt functions from
pmu_pstate.c to volt.c as it belongs there and also move the
arbitor specific functions under CLK_ARB as they will be removed
from safety build.
This patch does the following
*Move volt setup from pmu_pstate to volt
*Move clk freq related functions into CLK_ARB
*Replace pmu.h with nvgpu_mem.h in boardobj.h
*Rename obj_volt to nvgpu_pmu_volt
NVGPU-4491
NVGPU-4492
Change-Id: I9abc96f695fce41893311982a80dc3656aaa64d6
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2282361
Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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MISRA Advisory Rule 8.13 states that a pointer should point to a
const-qualified type wherever possible.
This change eliminates such violations from the use of
nvgpu_timeout_expired_msg_cpu() by marking the temporary
struct nvgpu_timeout pointer const.
Jira NVGPU-3178
Change-Id: Id0c77f2a18db29dcc1125540fdc02ab246c68092
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283774
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>
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Coverity 2019.06 has a bug due to which it scans and reports violations
for uncompiled code. This change whitelists violations which are only
visible for the Linux build. Linux is not part of the safety build.
Therefore, these violations can be whitelisted.
Bug 2799838
Change-Id: Ief24b121741d36d1c34a117122f1d6fd3e31f35f
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283210
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The atomic counter in interrupt handler can overflow and result in
calling of BUG() which will crash the process. The equivalent
functionality can be implemented with just setting an atomic variable at
start of handler and resetting at end of handler. The wait can be longer
in case there is constant interrupts coming but ultimately it will end.
Generally the wait path is not time critical so it should not be an
issue. Also, fix the unit tests for mc.
Change-Id: I9b8a236f72e057e89a969d2e98d4d3f9be81b379
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2247819
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Update SW quiesce as follows:
- After waking up sw_quiesce_thread, nvgpu_sw_quiesce
masks interrupts, then disables and preempts runlists
without lock. There could be still a concurrent thread
that would re-enable the runlist by accident. This is
very unlikely and would mean we are not in mission mode
anyway.
- In sw_quiesce_thread, wait NVGPU_SW_QUIESCE_TIMEOUT_MS,
to leave some time for interrupt handler to set error
notifier (in case of HW error interrupt). Then disable
and preempt runlists, and set error notifier for remaining
channels before exiting the process.
Also modified nvgpu_can_busy to return false in case
SW quiesce is pending. This will make subsequent
devctl to fail.
Jira NVGPU-4512
Change-Id: I36dd554485f3b9b08f740f352f737ac4baa28746
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2266389
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This patch adds boundary value check for common.fifo parameters as
listed below.
1. nvgpu_channel_setup_bind() includes a condition to check that value
of num_gpfifo_entries does not exceed 2^31. Otherwise prints message and
returns error.
2. nvgpu_tsg_bind_channel() includes a condition to check if channel
subctx had ASYNC id. If true, runqueue selector is set to 1 and 0
otherwise. This check is to be moved from devctl to common.fifo.
Jira NVGPU-4817
Change-Id: Id1c9253945859c245e584b5c42b3285a6b620055
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278613
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The HAL gops_ltc.init_fs_state is private to the common.ltc unit, thus
the gv11b implementation gv11b_ltc_init_fs_state is private. So, hide it
from doxygen to cleanup SWVR traceability.
JIRA NVGPU-4818
Change-Id: I141d89e6e4859fb9dd554a2943a39939e6461084
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280642
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nvgpu_init_hal is private to the common.init unit in the driver, used
only by nvgpu_detect_chip. However, it is used extensively by the unit
tests, so it can't be static. So, hide it from doxygen, so it is not
included in SWVR traceability.
Add missing target APIs in SWUTS for init UTs.
JIRA NVGPU-4818
Change-Id: I4d8acf29e9cbafdfd26d7088f98974da3b12a8ba
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280641
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Cleanup issues with traceability for common.mc:
- Move these declarations under macros or @cond as they are either
non-fusa or private functions to the unit:
- gm20b_mc_is_enabled
- mc_gp10b_log_pending_intrs
- mc_gp10b_ltc_isr
- gv11b_mc_is_intr_hub_pending
- Fix typo in SWUTS for gv11b_mc_is_stall_and_eng_intr_pending
JIRA NVGPU-4818
Change-Id: I53a332627772e4d793430159ac1924c8f9ce8c1c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280640
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Whitelist the following CERT-C INT31-C, DCL37-C and EXP47-C violations
from atomic.h reported due to an issue in the Coverity scanner tool
(version 2019.06).
Violations:
1. cert_int31_c_violation: Casting "__atomic_fetch_sub_4(&v->v, i, 5)"
from "unsigned int" to "int" without checking its value may result in
lost or misinterpreted data.
2. cert_int31_c_violation: Casting "i" from "int" to "unsigned int"
without checking its value may result in lost or misinterpreted data.
3. cert_exp37_c_violation: Calling function "__atomic_fetch_add_4(void
volatile *, unsigned int, int)" with the argument "i", which has an
incompatible type "int" instead of "unsigned int".
4. cert_dcl37_c_violation: The reserved identifier "__atomic_load_ptr",
which is reserved for use as identifiers with file scope in both
the ordinary and tag name spaces, is declared.
Bug 200584380
JIRA NVGPU-4480
Change-Id: I9eebcca734f7081f9ca759c955e50a777e1ff25a
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279933
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Ajesh K V <akv@nvidia.com>
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Below functions in common.gr hal subunits include unnecessary
asserts to ensure value is not truncated when parsing into U32 size.
gm20b_gr_init_commit_global_attrib_cb()
gp10b_gr_init_commit_global_bundle_cb()
gp10b_gr_init_commit_global_pagepool()
gv11b_gr_init_commit_global_attrib_cb()
Make use of nvgpu_safe_cast_u64_to_u32() and remove unnecessary
asserts
gp10b_gr_init_commit_global_bundle_cb() function checks if size <=
U32_MAX value. But since size is declared as u32, it will always be
<= U32_MAX value so there is no point in the check.
Remove unnecessary check.
Jira NVGPU-4778
Change-Id: I9562afd1b31c3c6b095f607cbdf725d33d87effb
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279898
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