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7072b39783
Update prop hww handling to read and print additional diagnostic registers. Generate following registers: - gr_gpc0_prop_hww_esr_coord_r - gr_gpc0_prop_hww_esr_format_r - gr_gpc0_prop_hww_esr_state_r - gr_gpc0_prop_hww_esr_state2_r - gr_gpc0_prop_hww_esr_offset_r Rename following registers and associated fields: - pes_hww_esr => gpc0_ppc0_pes_hww_esr - setup_hww_esr = > gpc0_setup_hww_esr - zcull_hww_esr => gpc0_zcull_hww_esr - prop_hww_esr => gpc0_prop_hww_esr Jira NVGPU-6078 Bug 2865015 Change-Id: I131c48d2375ef0a76ac6c57ff1eb019f7c113286 Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2472894 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit