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1481fe54e9
This patch removes dependency between pmu.clk and hal.clk. Below is the implementation. *Init the clk domains inside pmu.clk unit. *Set this in a member variable and send it to hal.clk unit *Use this to determine the valid clock domains and read the monitor registers for each valid domains. *Return the domain with error code. *With this all the clk domain data is removed from hal.clk and only pmu.clk uses it as it owns it. JIRA NVGPU-4491 Change-Id: Ie57b2472cfaacfd2ce43ac7f95702bd95fb8bbaa Signed-off-by: Abdul Salam <absalam@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2272416 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>