Sumit Gupta
f05e1511ba
arm64: tegra: Disable Tegra234 sce-fabric node
...
Access to safety cluster engine (SCE) fabric registers was blocked
by firewall after the introduction of Functional Safety Island in
Tegra234. After that, any access by software to SCE registers is
correctly resulting in the internal bus error. However, when CPUs
try accessing the SCE-fabric registers to print error info,
another firewall error occurs as the fabric registers are also
firewall protected. This results in a second error to be printed.
Disable the SCE fabric node to avoid printing the misleading error.
The first error info will be printed by the interrupt from the
fabric causing the actual access.
Cc: stable@vger.kernel.org
Fixes: 302e154000ec ("arm64: tegra: Add node for CBB 2.0 on Tegra234")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com >
Signed-off-by: Ivy Huang <yijuh@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
Link: https://lore.kernel.org/r/20241218000737.1789569-3-yijuh@nvidia.com
Signed-off-by: Thierry Reding <treding@nvidia.com >
(cherry picked from mainline commit a5e6fc0a10fe280989f1367a3b4f8047c7d00ea6)
Bug 4369009
Change-Id: Ia0a5906362a636b07730792c8802daca2d53cc36
Signed-off-by: Yi Ju Huang <yijuh@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3295633
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
2025-02-04 18:24:46 -08:00
Sumit Gupta
309236c6bd
arm64: tegra: Fix typo in Tegra234 dce-fabric compatible
...
The compatible string for the Tegra DCE fabric is currently defined as
'nvidia,tegra234-sce-fabric' but this is incorrect because this is the
compatible string for SCE fabric. Update the compatible for the DCE
fabric to correct the compatible string.
This compatible needs to be correct in order for the interconnect
to catch things such as improper data accesses.
Cc: stable@vger.kernel.org
Fixes: 302e154000ec ("arm64: tegra: Add node for CBB 2.0 on Tegra234")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com >
Signed-off-by: Ivy Huang <yijuh@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
Link: https://lore.kernel.org/r/20241218000737.1789569-2-yijuh@nvidia.com
Signed-off-by: Thierry Reding <treding@nvidia.com >
(cherry picked from mainline commit 604120fd9e9df50ee0e803d3c6e77a1f45d2c58e)
Bug 4369009
Change-Id: I68743045fc4621527b0ebdf2c97ed23b4fc50d22
Signed-off-by: Yi Ju Huang <yijuh@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3295605
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
2025-02-04 18:24:27 -08:00
Brad Griffis
6476a872ee
arm64: tegra: Fix Tegra234 PCIe interrupt-map
...
For interrupt-map entries, the DTS specification requires
that #address-cells is defined for both the child node and the
interrupt parent. For the PCIe interrupt-map entries, the parent
node ("gic") has not specified #address-cells. The existing layout
of the PCIe interrupt-map entries indicates that it assumes
that #address-cells is zero for this node.
Explicitly set #address-cells to zero for "gic" so that it complies
with the device tree specification.
NVIDIA EDK2 works around this issue by assuming #address-cells
is zero in this scenario, but that workaround is being removed and so
this update is needed or else NVIDIA EDK2 cannot successfully parse the
device tree and the board cannot boot.
Fixes: ec142c44b026 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT")
Signed-off-by: Brad Griffis <bgriffis@nvidia.com >
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20241213235602.452303-1-bgriffis@nvidia.com
Signed-off-by: Thierry Reding <treding@nvidia.com >
(cherry picked from mainline commit b615fbd70fce8582d92b3bdbbf3c9b80cadcfb55)
JIRA TEGRAUEFI-3252
Change-Id: I6dfe58de9346f79ed02b5bd0ff427e317b631db3
Signed-off-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3295646
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
2025-02-04 06:39:54 -08:00
Akhil R
09148b037f
nv-public: Fix DMA REQ_SEL ID for SPI2
...
REQ_SEL ID for spi@c260000 is '16' as per the flow control mapping
document. Update the incorrect value in the device tree.
Bug 4945416
Signed-off-by: Akhil R <akhilrajeev@nvidia.com >
Change-Id: I42e5f9f4bbc896976c4861934fb2f8170e8edf1b
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3243690
Reviewed-by: Bibek Basu <bbasu@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
2024-11-06 04:08:58 -08:00
Vedant Deshpande
4470ed7355
arm64: tegra: Add Tegra234 PCIe C4 EP definition
...
Add PCIe C4 EP controller definition in device tree for Tegra234
devices.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Bug 4707773
Change-Id: Ib7d962389aafd2cc5eef4e5afaa2171c8009270c
Signed-off-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3207079
(cherry picked from commit 9551f57a77https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3216029
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
2024-09-24 19:26:34 -07:00
Vedant Deshpande
be1ea5053f
arm64: tegra: Add DMA properties for Tegra234 UARTA
...
Adding the missing dmas and dma-names properties which are required
for UARTA when using with the Tegra HSUART driver.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Bug 4707773
Change-Id: I3b952cf72b534e9478c2e679ab0f58b4d837bfaf
Signed-off-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3207076
(cherry picked from commit 8fdf97141dhttps://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3216025
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
2024-09-24 19:26:19 -07:00
Brad Griffis
e0688a1de6
Revert "[UPSTREAM PENDING] soc: tegra234: Enable USB remote wakeup support"
...
This reverts commit ac9e946992bgriffis@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3206861
(cherry picked from commit be133b5e99https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3216022
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
2024-09-24 19:26:04 -07:00
Brad Griffis
fb6feb2209
Revert "nv-public: arm64: tegra: disable sce fabric node"
...
This reverts commit 6acdd6c524https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3178463
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
2024-07-19 18:54:05 -07:00
Brad Griffis
c188adf0b1
Revert "tegra234: Add smmu_test node"
...
This reverts commit c85caf7ae9https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3178462
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
Tested-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
2024-07-19 16:38:59 -07:00
Ashish Mhetre
c85caf7ae9
tegra234: Add smmu_test node
...
Add smmu_test node in t23x dts and enable it. It's used by
smmu tests.
Bug 4739062
Change-Id: Ib42cb4feed4eaf4947bb9734db6801fa25f772a5
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3178085
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
2024-07-19 11:25:14 -07:00
Vedant Deshpande
5c1e11f1bc
UPSTREAM: arm64: tegra: Add Tegra Security Engine DT nodes
...
Add device tree nodes for Tegra AES and HASH engines.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Bug 4707773
(cherry picked from mainline commit 0d23cacb2ae0fc9d8d40f36cb37ad272b3249ffe)
Change-Id: I5fe86a6943f3a57cd6426c3a1ed20e2f773b8430
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3169654
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
Tested-by: Brad Griffis <bgriffis@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
2024-07-16 06:54:16 -07:00
Thierry Reding
6792bbce69
arm64: tegra: Add dmas and dma-names for Tegra234 UARTE
...
Commit 940acdac99b2 ("arm64: tegra: Add UARTE device tree node on
Tegra234") added the device tree node for the UARTE on Tegra234 but
didn't include the "dmas" and "dma-names" properties required for this
device when it's used in high-speed mode.
Bug 4037899
Bug 4707773
Change-Id: Ia06436b77706395c1b69ebdcd9db4cfcc3a7d221
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3035768
(cherry picked from commit 82bdc94bf1vedantd@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3172824
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
2024-07-12 19:39:18 -07:00
Thierry Reding
16cc3a21f8
arm64: tegra: Mark Tegra234 SPI as compatible with Tegra114
...
According to the bindings, both Tegra210 and Tegra114 compatible strings
need to be specified since the version of this hardware block found in
Tegra210 is backwards-compatible.
Bug 4037899
Bug 4707773
Change-Id: I8391f486ac829b00b7232b4edb30a7eb5896339f
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3035767
(cherry picked from commit 722ad13030vedantd@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3172823
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
2024-07-12 19:39:13 -07:00
Thierry Reding
941cde9d73
arm64: tegra: Use correct format for clocks property
...
phandle and clock specifier pairs should be enclosed in angular
brackets.
Bug 4037899
Bug 4707773
Change-Id: I07fcce3729ebf74d17847f6502b87438b0548cbb
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3035766
(cherry picked from commit 089ac40a2evedantd@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3172822
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
2024-07-12 19:39:09 -07:00
Sumit Gupta
6acdd6c524
nv-public: arm64: tegra: disable sce fabric node
...
Access to SCE fabric registers was blocked by firewall after the
introduction of FSI. After that any illegal access by some SW to SCE
registers is correctly resulting in the CBB firewall error. But when
CCPLEX tries accessing the SCE-fabric registers to print error info,
then another firewall error comes as the fabric registers are also
firewall protected. This causes second error info to be printed in
CBB error dump which is misleading. Disabling the SCE fabric node
to avoid printing the misleading info. The first error info will be
printed by the interrupt from the fabric causing the actual access.
Bug 4369009
Change-Id: Ic53283b79b5ca385f051b002d986da5e81aa4eb2
Signed-off-by: Sumit Gupta <sumitg@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3170439
Reviewed-by: Bibek Basu <bbasu@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
2024-07-09 01:27:49 -07:00
sheetal
0c60f448cb
[UPSTREAM] arm64: tegra: Define missing IO ports
...
I2S3, I2S5, DMIC1, DMIC2, DMIC4, DSPK1 and DSPK2 IO ports are not
defined. Those are not defined earlier because it was inside platform
DT and defined only for supported IOs by the platform.
Now these are part of SoC DTSI, all IOs ports are defined
so that all the ports are available to be used by platforms.
Upstream commit ID: f5c8e31e71711061338b572c26f456bf5acdf6a0
Bug 4429992
TAS-2240
Change-Id: I6367806291d7e7685087710f646c412c8194b263
Signed-off-by: sheetal <sheetal@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3086459
(cherry picked from commit e3664fd0c9https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3151094
Tested-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
2024-06-06 06:24:41 -07:00
sheetal
dd5e2c462d
[UPSTREAM] arm64: tegra: Move AHUB ports to SoC DTSI
...
AHUB and its child nodes ports are part of platform DTS and with new
platform support these entries need to be defined again.
As they are common across the platforms, moving them to SoC
DTSI to avoid code duplicacy.
AHUB HW accelerators are used for audio processing and typically all of
these are made available. Platforms can enable all of these just by
enabling the AHUB parent device. However IO interfaces (which are also
children of AHUB) are selectively enabled based on what the platform
actually exposes for interaction with external world.
Upstream commit ID: 71a3b9b17537a114705d2d01d227e19fd7353bff
Bug 4429992
TAS-2240
Change-Id: I3c148efaa5ea7ca1ac2063e3425fa54172aff346
Signed-off-by: sheetal <sheetal@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3086458
(cherry picked from commit 6790d74964https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3151093
Tested-by: Brad Griffis <bgriffis@nvidia.com >
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
2024-06-06 06:24:36 -07:00
Praveen AC
3d225ae86a
t234:[P3762/P3783]:Increase i2cbus-8 freq to 400khz.
...
Add overlay to increase i2c bus-8 freq to 400khz.
Bug 4510846
Change-Id: I662c075b34992e088b2baa6a03c8db744171be4b
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3131809
Tested-by: Praveen AC <pac@nvidia.com >
Reviewed-by: Shubham Chandra <shubhamc@nvidia.com >
Reviewed-by: Narendra Kondapalli <nkondapalli@nvidia.com >
Reviewed-by: Bibek Basu <bbasu@nvidia.com >
Reviewed-by: Ankur Pawar <ankurp@nvidia.com >
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Praveen AC <pac@nvidia.com >
Reviewed-by: Anubhav Rai <arai@nvidia.com >
2024-05-07 01:54:48 -07:00
Henry Lin
1db409403e
soc: tegra234: Enable USB remote wakeup support
...
Add SC7 wake support:
- wake 76 for SS port 0
- wake 77 for SS port 1
- wake 78 for SS port 2 and SS port 3
- wake 79 for USB2 port 0
- wake 80 for USB2 port 1
- wake 81 for USB2 port 2
- wake 82 for USB2 port 3
Bug 4166189
Change-Id: I1b519a58784e533c9c41f470f1e5bf884b366764
Signed-off-by: Henry Lin <henryl@nvidia.com >
Signed-off-by: Wayne Chang <waynec@nvidia.com >
Signed-off-by: Haotien Hsu <haotienh@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3121598
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Reviewed-by: WK Tsai <wtsai@nvidia.com >
Reviewed-by: Sing-Han Chen <singhanc@nvidia.com >
2024-04-26 00:39:47 -07:00
Praveen AC
9944294772
nv-public:P3762: Fix probe fail of Hawks during boot.
...
1. Made all sensors of Hawks as master sensors so any sensor is capable
to program SERIALIZERS i2c address translation during probe time
i.e first come first basis.So, We wont miss or skip SERIALIZERS i2c trans.
2. Changed i2c bus 8 freq to 400khz
Bug 4510846
Change-Id: Ia627ebd430709efac64ec849b37167c88b5cf012
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3112253
Tested-by: Praveen AC <pac@nvidia.com >
Tested-by: Shubham Chandra <shubhamc@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Reviewed-by: Shubham Chandra <shubhamc@nvidia.com >
Reviewed-by: Ankur Pawar <ankurp@nvidia.com >
Reviewed-by: Praveen AC <pac@nvidia.com >
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com >
2024-04-12 09:09:18 -07:00
Jon Hunter
0424f757a5
UPSTREAM: arm64: tegra: Fix Tegra234 MGBE power-domains
...
The MGBE power-domains on Tegra234 are mapped to the MGBE controllers as
follows:
MGBE0 (0x68000000) --> Power-Domain MGBEB
MGBE1 (0x69000000) --> Power-Domain MGBEC
MGBE2 (0x6a000000) --> Power-Domain MGBED
Update the device-tree nodes for Tegra234 to correct this.
Bug 3820445
Bug 4293378
Fixes: 610cdf3186bc ("arm64: tegra: Add MGBE nodes on Tegra234")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Change-Id: I470a7128e2bc05c5c66539fab544d091b2f846a4
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3082846
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2024-02-23 15:54:35 -08:00
Thierry Reding
e8a5ee3d34
UPSTREAM: arm64: tegra: Add AXI configuration for Tegra234 MGBE
...
The MGBE devices found on Tegra234 need their AXI interface configured
to operate at peak performance. Ideally we would do this in the driver
based off the compatible string, but the DT bindings already specify a
separate mechanism, so reuse that.
Bug 3820445
Bug 4293378
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Jon Hunter <jonathanh@nvidia.com >
Change-Id: I206b4f47b0243b21064df1dedcad05e9f316507f
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3082845
Reviewed-by: Brad Griffis <bgriffis@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2024-02-23 15:54:30 -08:00
Gautham Srinivasan
4c2aab0767
[UPSTREAM V6.6] arm64: tegra: Add SPI device tree nodes for Tegra234
...
Create the device tree nodes for the SPI1, SPI2 and SPI3 controllers
found on Tegra234.
Bug 4130525
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
(cherry picked from mainline commit bb9667d8187b58f1524a3ce203a0ddd7b107347a)
Change-Id: I3269d358f8cac2500963afa26651e3f2995a3fc6
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3019986
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Tested-by: Gautham Srinivasan <gauthams@nvidia.com >
Reviewed-by: Gautham Srinivasan <gauthams@nvidia.com >
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com >
2023-11-21 14:10:19 -08:00
Gautham Srinivasan
5a7c289143
[UPSTREAM V6.6] arm64: tegra: Add UARTE device tree node on Tegra234
...
This commit adds the device tree node for UARTE on Tegra234.
Bug 4148340
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
(cherry picked from mainline commit 940acdac99b24cc96e8c55b71e7386ce2deb05cf)
Change-Id: I3d702277dd34575f63c80383e1bf76fa9d7a2ffd
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/3019984
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Tested-by: Gautham Srinivasan <gauthams@nvidia.com >
Reviewed-by: Gautham Srinivasan <gauthams@nvidia.com >
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com >
2023-11-21 14:10:09 -08:00
Kartik
5304377476
arm64: tegra: Use correct interrupts for Tegra234 TKE
...
The shared interrupts 0-9 of the TKE are mapped to interrupts 0-9, but
shared interrupts 10-15 are mapped to 256-261. Correct the mapping for
the final 6 interrupts. This prevents the TKE from requesting the RTC
interrupt (along with several GTE and watchdog interrupts).
Bug 4173986
Change-Id: I5357b9c57d0d01345da54e78a8d8d4506ac8971d
Reported-by: Shubhi Garg <shgarg@nvidia.com >
Fixes: 28d860ed02c2 ("arm64: tegra: Enable native timers on Tegra234")
Signed-off-by: Thierry Reding <treding@nvidia.com >
Tested-by: Kartik <kkartik@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2995358
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com >
Reviewed-by: Kartik Rajput <kkartik@nvidia.com >
(cherry picked from commit bc36839056https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2998420
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Tested-by: Kartik Rajput <kkartik@nvidia.com >
2023-10-17 00:09:27 -07:00
Laxman Dewangan
8b15f87dc5
tegra234: Set audio-hub clock parent as PLLP
...
Set the audio-bub parent clock as PLLP instead of PLLA
to align the configuration to mainline 6.5.rc2.
Bug 4037899
Change-Id: Icbbcb7e22a5ef63701b507ad53bd53f83f063fed
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2948444
(cherry picked from commit 8e955b03ddhttps://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955404
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-08-12 22:11:31 -07:00
Vidya Sagar
7571e0a6f2
arm64: tegra: Fix non-prefetchable aperture of PCIe C3 controller
...
Fix the starting address of the non-prefetchable aperture of PCIe C3
controller.
Fixes: ec142c44b026 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT")
Cherry picked from 47a2f35d9ea76d92aa2385671f527b75aa9dfe45
Change-Id: I77dd2e744c11ab657719e2ec6c8357883967e6bc
Signed-off-by: Vidya Sagar <vidyas@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2947578
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com >
(cherry picked from commit 3a45ac52bdhttps://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955403
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-08-12 22:11:21 -07:00
Dipen Patel
bddfa3b017
[UPSTREAM V6.4]arm64: tegra: Add Tegra234 GTE nodes
...
Add GTE LIC and AON GPIO nodes for the tegra234 SoC.
Bug 3961133
Change-Id: I7cd2cea078aa48f8a36b73238f2e714165f5a406
Signed-off-by: Dipen Patel <dipenp@nvidia.com >
Acked-by: Thierry Reding <treding@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2913469
(cherry picked from commit d7506e9d3ahttps://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955402
Tested-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-08-12 10:13:19 -07:00
Laxman Dewangan
7993466be3
tegra234: overlay: Remove unnecessarily xpads overlay
...
The xusb pads initialisation of the USB nodes are synced
with mainline. This have the required phy initialisation
in usb nodes. Hence, it is not required from overlay.
Remove the non-required overlay and label.
Bug 4037899
Change-Id: I3001a76802bf9413e5c4657022b162f6fc166091
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2945472
(cherry picked from commit 4299749de8https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955401
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-08-12 10:13:14 -07:00
Laxman Dewangan
6ce3794fdb
tegra234: Move reset/clock names property to overlay
...
The serial and qspi nodes of mainline version of tegra234.dtsi
do not have the clock and reset names as properties.
Match the tegra234.dtsi and move these properties to overlay.
Bug 4037899
Change-Id: I47647ece2d99430623bbaf7af5176298405c277a
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2945386
(cherry picked from commit f596618d50https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955400
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-08-11 15:41:56 -07:00
Jon Hunter
ff2c20a738
arm64: tegra: Add DSU PMUs for Tegra234
...
Populate the DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)
devices for Tegra234 which has one DSU PMU per CPU cluster.
Cherry picked from commit 8e0ae0fb4b91655bcdca2a4d7d16ebb81fc5d786
Change-Id: Ie4fe03fcb04d2ea7022d650e222d1c44f408e9e0
Signed-off-by: Jon Hunter <jonathanh@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2942606
(cherry picked from commit 5b1c490da5https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955399
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-08-11 15:41:30 -07:00
Laxman Dewangan
e177fde95a
tegra234: Move dma-coherant property from overlay to base
...
The base DTSI file of tegra234, tegra234.dtsi, have already
property of dma-coherent inside node host1x@13e00000 in mainline.
Move this property from overlay to the base file to match
tegra234.dtsi with mainline.
Bug 4037899
Change-Id: I1260ce822a594308e9a0cc672c4669d185e20277
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2940603
(cherry picked from commit 5fd589841fhttps://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2955398
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-08-11 15:41:25 -07:00
Prathamesh Shete
894f5a9d0b
nvidia-oot: dts: split and move pinmux dt node to base dts
...
Split pinmux DT node into MAIN and AON instance
and move it to base dtsi.
Cherry picked from commit 282fde002760d3a006128c1d70b329e68a6ef844
Change: Deleting the duplicate content from overlay file.
Bug 3950014
Bug 4204726
Change-Id: I7beb4074faf0c48e8ab38136ef7b495fd8c60fa6
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Prathamesh Shete <pshete@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2943363
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
2023-07-31 03:38:48 -07:00
Sumit Gupta
4568a0edb4
tegra234: move opp from base overlay to tegra234 dts
...
OPP table in Upstream tegra234.dtsi is synched with latest
downstream table in below patch. In this change, moving
the table from base overlay to "nv-public/tegra234.dtsi" as
the tables are Upstreamed now.
https://lore.kernel.org/lkml/20230713133850.823-1-sumitg@nvidia.com/T/
Bug 4204733
Change-Id: I0969d0ac90b0c1c7c0a5c77eb532ffad646d3436
Signed-off-by: Sumit Gupta <sumitg@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2940613
(cherry picked from commit da6a15459chttps://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2944872
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Tested-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com >
2023-07-30 21:56:53 -07:00
Yi-Wei Wang
0038ca5d15
[UPSTREAM v6.5]: arm64: tegra: Add Tegra234 thermal support
...
Add device tree node for the BPMP thermal node on Tegra234 and add
thermal zone definitions.
Cherry picked from commit 09d990782a243b97eb566717a2155a306a2f42af
Bug 3960800
Bug 4035713
Bug 4204722
Acked-by: Jon Hunter <jonathanh@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Yi-Wei Wang <yiweiw@nvidia.com >
Change-Id: Ifef49687ef550cbdcdf26a511a69b1e46502b376
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2941394
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-07-28 08:13:30 -07:00
Mikko Perttunen
1348e3b713
UPSTREAM: arm64: tegra: Mark BPMP channels as no-memory-wc
...
The Tegra SYSRAM contains regions access to which is restricted to
certain hardware blocks on the system, and speculative accesses to
those will cause issues.
Patch 'misc: sram: Only map reserved areas in Tegra SYSRAM' attempted
to resolve this by only mapping the regions specified in the device
tree on the assumption that there are no such restricted areas within
the 64K-aligned area of memory that contains the memory we wish to map.
Turns out this assumption is wrong, as there are such areas above the
4K pages described in the device trees. As such, we need to use the
bigger hammer that is no-memory-wc, which causes the memory to be
mapped as Device memory to which speculative accesses are disallowed.
As such, the previous patch in the series,
'firmware: tegra: bpmp: do only aligned access to IPC memory area',
is required with this patch to make the BPMP driver only issue aligned
memory accesses as those are also required with Device memory.
Fixes: fec29bf04994 ("misc: sram: Only map reserved areas in Tegra SYSRAM")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com >
Reviewed-by: Yousaf Kaukab <ykaukab@suse.de >
Signed-off-by: Thierry Reding <treding@nvidia.com >
[mperttunen@nvidia.com: port to downstream dts]
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Change-Id: I8a864a5a858077a1f1d2d45da706559637bc3a94
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2908381
Reviewed-by: svcacv <svcacv@nvidia.com >
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Tested-by: Bitan Biswas <bbiswas@nvidia.com >
2023-05-24 08:59:40 -07:00
Laxman Dewangan
7905c373fe
tegra234.dtsi : Add ECAM register of PCIE
...
Add ECAM register entry in pcie nodes to match with
mainline v6.3-rc5 to help the base DTSI to align with
mainline.
Bug 4057304
Change-Id: I6ebfbcd768dead5947ed80b589f5533db0c46986
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/t23x-public-dts/+/2896563
Reviewed-by: Ashish Singhal <ashishsingha@nvidia.com >
Reviewed-by: Vidya Sagar <vidyas@nvidia.com >
Tested-by: Vidya Sagar <vidyas@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-05-10 06:28:38 -07:00
Laxman Dewangan
2aa2bf5521
tegra234: Update cache properties
...
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
This change is based on mainline change
commit 27f1568b1d5fe35014074f92717b250afbe67031
Author: Pierre Gondois <pierre.gondois@arm.com >
arm64: tegra: Update cache properties
Bug 4057304
Change-Id: Idb402b1d8f29873d2403d340bbd6e4902d9b5f05
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2886422
Reviewed-by: svcacv <svcacv@nvidia.com >
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Laxman Dewangan
cdefc8270d
tegra234: Move aon and hsp node from base to overlay
...
The AON and HSP nodes are not upstreamed yet and so it needs
to be added from the overlay file instead of base file.
Bug 4057304
Change-Id: Ib4f1c2dc7d8124002172dcd34b6dd18360fcecbd
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2884844
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Laxman Dewangan
ddedbadb95
base: tegra234: Bump #address-cells and #size-cells
...
The #address-cells and #size-cells properties for the top-level bus were
set to 1 because that was enough to represent the register ranges of all
the IP blocks on that bus. However, most of these devices can do DMA to
a larger address space, so translation of DMA addresses needs to happen
in a 64-bit address space.
Partially this was already done by the memory controller increasing that
address space by setting #address-cells and #size-cells to 2, but a full
DMA address translation would still cause truncation when traversing to
the top-level bus.
Fix this by setting #address-cells = <2> and #size-cells = <2> on the
top-level bus and adjusting all "reg" and "ranges" properties of its
children.
While at it, also move the PCI and GPU nodes back under the top-level
bus where they belong. The were put outside of it to work around this
same problem.
This change is based on the below change from mainline v6.3-rc5:
commit 2838cfddbc1c4e12dacf8219efb481ab11c114a4
Bug 4057304
Change-Id: Iedd79836dac2a6760a604da6e61db4735e246435
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2884732
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Laxman Dewangan
a84636dac2
soc: tegra234: dtsi: Sync nodes matching with mainline v6.3-rc5
...
Match the nodes of the tegra234.dtsi wil the mainline V6.3-rc5.
This patch matches:
- Property sequence
- removing of iommu property from i2c nodes of base and
moving to overlay.
Bug 4057304
Change-Id: Ib621a5af84262430e4c2b00848f102ca3488cfbf
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2884371
Reviewed-by: svcacv <svcacv@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Laxman Dewangan
039393d6cc
soc: tegra234: Move pwm, mmc, padctrl, usb nodes to base
...
The following nodes are upstreamed and available in kernel V6.3-rc5.
serial@31d0000
mmc@3400000
pwm@3290000
pwm@32a0000
pwm@c340000
pwm@32c0000
pwm@32d0000
pwm@32e0000
pwm@32f0000
nvdec@15480000
padctl@3520000
usb@3550000
usb@3610000
Integrate the changes from mainline.
68c31ad01105 arm64: tegra: Add NVDEC on Tegra234
d71b893a119d arm64: tegra: Add Tegra234 SDMMC1 device tree node
1bbba854bc40 arm64: tegra: Add SBSA UART for Tegra234
2566d28c4097 arm64: tegra: Populate Tegra234 PWMs
6e505dd6804f arm64: tegra: Enable XUSB host function on Jetson AGX Orin
320e0a703737 arm64: tegra: Populate the XUDC node for Tegra234
Change-Id: If48fce7dce7bbbcb274e46e9eea50acedf7c21b6
Signed-off-by: Wayne Chang <waynec@nvidia.com >
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com >
Signed-off-by: Prathamesh Shete <pshete@nvidia.com >
Signed-off-by: Jon Hunter <jonathanh@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2882651
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
2023-04-19 18:19:37 +00:00
Laxman Dewangan
4941254a9b
arm64: tegra234: Sort nodes by unit-address, then alphabetically
...
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
This is based on the work done by Thierry in the mainline
commit 79ed18d9ece474c15a2578e1cc5bfb4fce7a8eb7
Author: Thierry Reding <treding@nvidia.com >
arm64: tegra: Sort nodes by unit-address, then alphabetically
The reference is taken from v6.3-rc5
Bug 4057304
Change-Id: I4a190193e2d106948fb1879ec1ad9fc4d29e33c8
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2882047
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
Reviewed-by: svcacv <svcacv@nvidia.com >
2023-04-19 18:19:37 +00:00
Akhilesh Reddy Khumbum
8da2465d86
soc: t23x-generic-dts: add aon and top1 hsp nodes
...
- Add AON and TOP1 HSP nodes to the base dts file to enable
the AON kernel mode driver.
Bug 3962483
Signed-off-by: Akhilesh Reddy Khumbum <akhumbum@nvidia.com >
Change-Id: If21606dbed6472f3f808e1bd20e3391685c2c0b4
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2873057
Reviewed-by: svcacv <svcacv@nvidia.com >
Reviewed-by: Robert Collins <rcollins@nvidia.com >
2023-04-19 18:19:37 +00:00
Jon Hunter
34c44c6899
arm64: tegra: Populate address/size cells for Tegra234 I2C
...
Populate the address and size cells properties for the I2C devices on
Tegra234.
Cherry-picked commit: 260e8d42b1d0c3083c60edbab501404180b8d2e2
Bug 4037899
Change-Id: Ifc2379caff192ad6cc5c76c583fdd0e43082885b
Signed-off-by: Jon Hunter <jonathanh@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2873778
Reviewed-by: svcacv <svcacv@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Vidya Sagar
eca3c2680d
t23x-generic-dts: Fix Prefetchable aperture ranges of Tegra234 PCIe controllers
...
commit edf408b946d3 ("PCI: dwc: Validate iATU outbound mappings against
hardware constraints") exposes an issue with the existing partitioning of
the aperture space where the Prefetchable apertures of controllers
C5, C7 and C9 in Tegra234 cross the 32GB boundary hardware constraint.
This patch makes sure that the Prefetchable region doesn't spill over
the 32GB boundary.
Cherry picked from below mainline commit:
248400656b1c: arm64: tegra: Fix Prefetchable aperture ranges of Tegra234 PCIe controllers
Bug 3835199
Bug 3970434
Fixes: ec142c44b026 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT")
Change-Id: I9309fa26a357f6b5dd042968b331593b3133763a
Signed-off-by: Vidya Sagar <vidyas@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2859930
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com >
2023-04-19 18:19:37 +00:00
Akhil R
949d7a6fe2
arm64: tegra: Add dma-channel-mask in GPCDMA node
...
Add dma-channel-mask property in Tegra GPCDMA device tree node.
The property would help to specify the channels to be used in
kernel and reserve few for the firmware. This was previously
achieved by limiting the channel number to 31 in the driver.
Now since we can list all 32 channels, update the interrupts
property as well to list all 32 interrupts.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Reviewed-by: Jon Hunter <jonathanh@nvidia.com >
Change-Id: I9a76f19fab54f7b7e1d7f73d0229e73f432b8d56
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2858677
Reviewed-by: svcacv <svcacv@nvidia.com >
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Revanth Kumar Uppala
7dba78d931
nvethernet: Move nvidia,vm-irq-config to overlay
...
Move nvidia,vm-irq-config to overlay from Base
DT to overlay DT
Bug 3956724
Change-Id: Ib6c8f1af7aa5ccb6de8c19c1ae721d2ccd79f01e
Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2855643
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com >
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-by: Narayan Reddy <narayanr@nvidia.com >
Reviewed-by: svcacv <svcacv@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Revanth Kumar Uppala
534a12c1b9
soc: t23x-generic-dts: Add nvidia,vm-irq-config
...
Add nvidia,vm-irq-config DT parameter in new
base dts file.
Bug 3960809
Change-Id: Ia21ef6daadcca20ebbaa4009f667942a5f4ab3ba
Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2851012
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com >
Reviewed-by: svcacv <svcacv@nvidia.com >
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com >
Reviewed-by: Narayan Reddy <narayanr@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
Abhilash G
12d16d1e9e
generic-dts: base: Support kernel-oot image on orin-slt
...
Disable no-memory-wc in sram to fix bpmp clock
issue seen while boot of kernel-oot image on orin-slt.
Bug 3832193
Bug 3735097
Change-Id: I90c6c147f386e217a42ecedb3797d0626fce4e6b
Signed-off-by: Abhilash G <abhilashg@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/device/hardware/nvidia/soc/t23x-generic-dts/+/2830618
Reviewed-by: svcacv <svcacv@nvidia.com >
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com >
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com >
2023-04-19 18:19:37 +00:00
