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Author SHA1 Message Date
Tejal Kudav
d67cea61f1 gpu: nvgpu: Move SDL err info structs to common 
The SDL's error reporting code will be leveraged by central interrupt
controller (CIC) or common.cic unit.
This is a base patch to move SDL error reporting code from QNX
to common. Move the data structures used during error reporting to
common header - nvgpu_err_info.h

JIRA NVGPU-6522

Change-Id: Ie6b209323a14b9bb38e3402c2427fbcdaae52206
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2504726
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
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 2021-04-09 17:36:42 -07:00
Lakshmanan M
d4c33de919 gpu: nvgpu: Skip determine ppc config for MIG 
Added a logic to skip the query ppc config when MIG is enabled.

JIRA NVGPU-5650

Change-Id: Id95d016cd3fd1e7ee283ebd9e7e8c5ee677eafd3
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2510884
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-04-07 20:16:43 -07:00
Lakshmanan M
7de19b0956 gpu: nvgpu: Add api to get the physical gpc mask 
1) Added a utility api to query the physical gpc mask for a
gpu instance.
2) Expose physical gpc mask during MIG case (par with legacy case).

JIRA NVGPU-5650

Change-Id: I7efb031ac6539d8859b265f42d269233a3a421bf
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2510854
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2021-04-07 20:16:38 -07:00
Seshendra Gadagottu
f17d0c1c70 gpu: nvgpu: call prod programming hals for slcg ringstation units 
Added following helper function to program slcg prod values for
all priv_ring units:
static void nvgpu_cg_slcg_priring_load_prod(struct gk20a *g, bool enable);

Added slcg prod value programming hals for ringstation units in above
helper function.

Jira NVGPU-6026

Change-Id: I3aedb3428ee17f27ef4fc407da18ab6a3880dda7
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2501059
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2021-04-07 09:22:04 -07:00
Mayur Poojary
6277d57936 gpu: nvgpu: Add new api for setting longer timeslice on dbg node 
Add new ioctl api for setting longer timeslice and get timeslice
inside 'dbg' dev node.
Update ioctl gpu_get_characteristic to pass the max timeslice value
Add debugfs to access and change the max timeslice value

Bug 1842244

Change-Id: I7e80f59162cf5d90496f9752fc128f5fa8dcc7d2
Signed-off-by: Mayur Poojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2471569
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2021-04-06 04:37:38 -07:00
Prateek sethi
0335fa69ec arch: move sync unit to sub-unit of common.fifo 
Currently sync unit is neither a full unit nor part of lite unit.
Treating common.sync as separate unit will trigger multiple changes
including changes to RM SWAD. Due to the reason making sync unit to
subunit of common.fifo.

Jira NVGPU-6371

Change-Id: I6f44848b58397e3870b53d9180a1bf09090490dc
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2503186
(cherry picked from commit d8e3babc2c77bcfccab40e793d4ce78777011fca)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2505491
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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 2021-04-01 17:47:02 -07:00
srajum
a3efb4cc98 gpu: nvgpu: Hiding extra branch with nvgpu_assert(), BUG_ON() API 
- A static inline for POSIX/QNX so that we can hide the branch in
  nvgpu_assert(), BUG_ON() from the branch analysis for users of this
  function.

- A macro for BUG_ON() is showing the extra branch for every instance,
  which causes huge drop in branch coverage.

JIRA NVGPU-6547

Change-Id: Iaa77df2b4d5b3d49596f05d9554604582b1209ae
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2503609
(cherry picked from commit 6f36f0b47ac9911526b6c434a8cf5c4a456aeacf)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2504692
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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 2021-03-30 19:05:21 -07:00
Rajesh Devaraj
0a713d366a gpu: nvgpu: add doxygen for macros 
This patch adds doxygen for macros related to SDL unit.
Also, it removes macros related to unused service IDs.

LTC_RSTG is not present in GV11B. So, the error injection
should not be supported for LTC_RSTG. This patch moves
ltc_gv11b_debug_fusa as part of non-safety build.

JIRA NVGPU-6181

Change-Id: Iede1612f1c85e2fad80e22bcc9d10c4552c73a92
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
(cherry picked from commit 6bdd4781d8311613eebaf1cccead01823a45084e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2506140
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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 2021-03-30 07:51:36 -07:00
Antony Clince Alex
2d5d8e882f gpu: nvgpu: fix ce interrupt mask update 
The CE interrupt mask update should not be skipped if the driver doesn't
implement stall or non-stall interrupt handlers. At present, the mask update is
skipped if either is not implemented causing the other to remain disabled which
is not correct.

Update nvgpu_ce_engine_interrupt_mask to always return engine interrupt mask.

Bug 200709761

Change-Id: I503338e3f4d53c1e0b85b0974d862f7b88545ef2
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2506292
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
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 2021-03-29 19:02:16 -07:00
Bitan Biswas
bfa644d7fa gpu: nvgpu: fix external profile build 
The config CONFIG_GK20A_PM_QOS is not set for k5.10 and kstable. Adjust
the default config selection logic.

bug 200705253

Change-Id: I9455af6bfa3d7ef68f2d4551e148ee9c67f001d0
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2504877
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Manish Bhardwaj <mbhardwaj@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2021-03-27 08:23:53 -07:00
Divya Singhatwaria
6ffadc0e32 gpu: nvgpu: Remove hard coded constants from ACR 
During code inspection use of some hard coded
constants was found in some parts of the code.
Some constants are replaced by macros and some
are declared using const keyword.

JIRA NVGPU-6260

Change-Id: I95112dfcac7c8b996789a68e7ddf78b16713a823
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2485727
(cherry picked from commit b7e554267d9ef94ae5ac4529f4758127b97d3ba5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2492451
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Andrey Jivsov <ajivsov@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-27 04:57:37 -07:00
Martin Radev
38e6c9ae98 gpu: nvgpu: Check for int overflow in MAPPING_MODIFY path 
The check `buffer_offset + buffer_size > mapped_buffer->size` can
be bypassed with a large `buffer_size`, and that may lead to some
corruption. This patch combines the bounds checks into a more
robust one.

Jira NVGPU-6374

Change-Id: I55c8664134e763c66715bf3492867bc73686b694
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2504890
Reviewed-by: Scott Long <scottl@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-26 14:20:18 -07:00
Richard Zhao
a56d93aa2f gpu: nvgpu: linux: remove definition of ecc_sysfs_stats_htable 
No one uses it anymore.

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I0ea7f62e4e4e53d8da66bc00dcbe08a1f94e19a8
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2497936
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 2021-03-25 14:08:18 -07:00
Vedashree Vidwans
e445b57b04 gpu: nvgpu: Move interrupt ISR code to common 
This is one of the steps in restructuring of interrupt code.
- Move ISR logic to common code. This will allow us to add mixed ASIL
error handling levels.
- Modify nonstall ISR to use threaded interrupts. Bottom half of
nonstall ISR will run nonstall operations instead of adding work to
workqueues.
- Remove nonstall workqueue implementation.

JIRA NVGPU-6351

Change-Id: I5f891b0de4b0c34f6ac05522a5da08dc36221aa6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2467713
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 2021-03-25 02:34:57 -07:00
Sagar Kamble
ecfd675d9b gpu: nvgpu: free pmu variables allocated in early_init on error in rtos_init 
On error in pmu_rtos_init, pmu state was freed partly. That lead to
invalid access on subsequent nvgpu poweron. Free all pmu state in
such case.

Bug 200575409

Change-Id: I11166b55dbe00a225e811425d21500c3143a354c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2503577
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-03-24 14:47:44 -07:00
Divya Singhatwaria
4d02580df0 gpu: nvgpu: remove ZBC save/restore by PMU 
- ZBC save/restore registers are removed in GP10B PMU ucode.
- These registers are saved/restored from CTXSW ucode during
  ELPG entry/exit.
- Accessing the ZBC registers will cause PMU EXTERR error.
- To resolve this, ZBC functionality is removed from GP10B
  feature list in PMU ucode.
- From NvGPU driver, set NVGPU_PMU_ZBC_SAVE bit to false
  for GP10B
- Updated the GP10B PMU app version for the ucode:
  https://git-master.nvidia.com/r/c/tegra/kernel-firmware-t18x/+/2476260

P4 CL link related to this PMU ucode change:
https://p4sw-swarm.nvidia.com/changes/29594520

Bug 3233071
Bug 200696431

Change-Id: If3f1707b79699e7e2e65367418b25ac71b09cf0b
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
(cherry picked from commit 9170f2b77c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2500641
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-24 03:36:40 -07:00
Richard Zhao
beeec12e17 gpu: nvgpu: vgpu: add compression and fault recovery flags 
It added missing flags nvgpu core introduced recently:

NVGPU_SUPPORT_COMPRESSION
NVGPU_SUPPORT_FAULT_RECOVERY

Jira GVSCI-4622

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I7eb19b9fdcb834dd479707d8e8a7d21a9640dcfa
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2500558
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Reviewed-by: Aparna Das <aparnad@nvidia.com>
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 2021-03-23 16:43:06 -07:00
Antony Clince Alex
7f4e39aaf4 gpu: nvgpu: update pma stream teardown sequence 
On nvgpu-next chips additional steps are required for pma stream teardown.
Introduce wrapper function: NVGPU_NEXT_PROFILER_QUIESCE to perform this.

Jira NVGPU-5689

Change-Id: Iafdb9c6091b468b51295827467078d24e47d5e1f
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2491755
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 2021-03-23 04:39:20 -07:00
Antony Clince Alex
78dbec7f44 gpu: nvgpu: tu104: update CAU hal 
Update CAU hal tu104_gr_init_cau to use regops.get_cau_register_stride
hal function.

Jira: NVGPU-5689

Change-Id: I7c6e933630587e2d69b92173fd8c3fa8a7021c1d
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2489388
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 2021-03-23 04:39:14 -07:00
srajum
df6b305399 gpu: nvgpu: allowlist MISRA 10.3 and CERTC INT31-C QNX OS specified violations 
JIRA NVGPU-6548

Change-Id: I302070bb42acbf77b6e38490615d39ae9381215f
Signed-off-by: srajum <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2492668
(cherry picked from commit 80a46f6febcc03bf04e3ceff27952dc7bbfd714d)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2501391
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2021-03-22 06:39:33 -07:00
Vedashree Vidwans
8ebe7ca314 gpu: nvgpu: resolve GCC 9.3 toolchain errors 
Using updated GCC 9.3 toolchain results into build failure with string
functions. The updated toolchain requires strncat API to be independent
of source string length.
Update strncat used in nvgpu_worker_init_name to use destination length
only.

Bug 3270814

Change-Id: Ie50a2bed2dc09a5e34d14012e1ba878ef4ff176f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2500503
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Reviewed-by: Aidan Ha <aha@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-22 02:23:48 -07:00
Sagar Kamble
ff8fbf1004 Revert "gpu: nvgpu: disable DGPU_THERMAL_ALERT for k5.9 temporarily" 
Bug 200669739

This reverts commit d3f5905a0c.

Change-Id: I76a4ca4ec5be316c24410860a722a13383a3cea3
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2501427
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-19 14:37:00 -07:00
shashank singh
46cdc4d5ca gpu: nvgpu: add field in characteristics struct for max gpfifo entries 
Expose max gpfifo entries supported by nvgpu-rm. This limit will then be
propagated to application by nvrm_gpu.

Jira NVGPU-5846

Change-Id: Ibbbed9e1929c3bcc4eaaec9636d76e9e115e0c0c
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2482936
(cherry picked from commit b099a700aa055a5864ddb65cb546c9294c02b2b9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2497486
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 2021-03-19 10:09:44 -07:00
Divya Singhatwaria
cc34df76f9 gpu: nvgpu: Add support for ELPG_MS feature 
- To enable ELPG_MS feature, add identifier for
  MS_LTC engine.
- The identifier is then passed
  as pg_engine_id to enable the MS_LTC engine.
- Add enable flag NVGPU_ELPG_MS_ENABLED for
  enabling/disabling ELPG_MS feature at init.

JIRA NVGPU-6430

Change-Id: Ie1f477918332d85ec98b3bd4d05b8e773d74eab8
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480750
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2021-03-18 15:29:06 -07:00
ajesh
e10f201602 gpu: nvgpu: add checks as part of BVEC analysis 
Add checks in common.utils unit as part of BVEC analysis.
The check in enabled.c makes sure that unauthorized memory access
is not performed and string.c is modified with a check to avoid
a possible invocation of BUG.

Jira NVGPU-6268

Change-Id: I672c9c54a2d7b61219dee1b249b9e1345381a965
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2494951
(cherry picked from commit 464e101b23b0143ff2e26e07659e34d1678dbf9d)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2497647
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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 2021-03-17 18:23:42 -07:00
ajesh
3c519157f5 gpu: nvgpu: fix CERTC violations in Posix unit 
Fix violations of CERT POS54-C in Posix unit. Check the return
status from the function pthread_cond_broadcast.

JIRA NVGPU-6535

Change-Id: I8b7cc04534c856d609b14aef80e87fe1e0884a8e
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2495485
(cherry picked from commit 778e71defa2c1860f8560e2661a055207486f3c0)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2497641
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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 2021-03-17 18:23:36 -07:00
scottl
75d98f55d7 gpu: nvgpu: add SUPPORT_MAPPING_MODIFY flags 
Add new NVGPU_SUPPORT_MAPPING_MODIFY enable flag that is used to
control the value of the exported NVGPU_GPU_FLAGS_SUPPORT_MAPPING_MODIFY
flag.

These flags are currently only enabled on linux in non-virtualized
environments.

Jira NVGPU-6374

Change-Id: Ia85c353b767b4f7d0aebc04838f44996bc38c61f
Signed-off-by: scottl <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2490986
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2021-03-16 14:07:21 -07:00
Divya Singhatwaria
806ba3b870 gpu: nvgpu: checkpatch: Update for k5.10 
- svcacv showed -1 for the new patches due to
  "Unescaped left brace" error.
- Literal braces need to be escaped for latest version
  of Perl(> 5.26).
- Update the checkpatch.pl, spelling.txt files and add
  const_structs.checkpatch for k5.10

Change-Id: I96dfa28d8b324bd845a9d69aed00aed5b2de7761
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2494108
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-16 06:09:34 -07:00
Sagar Kadamati
9e13fd900d nvgpu: gpu: update runlist in vserver 
On QNX, Setting runlist is not happening till runlist submit. On Linux,
Setting runlist is happening at the time of channel open. due to
implimentations, which effect's channel configuration.

We need runlist for channel configuration from now.

Adding runlist parameter for below calls
 * TEGRA_VGPU_CMD_TSG_BIND_CHANNEL
 * TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX

Bug 200701789

Change-Id: Ibd3262b43e38f54c76c4ae67ce683eccf4460cdc
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2485256
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2021-03-16 06:07:30 -07:00
Sumit Gupta
e5491327fa gpu: nvgpu: fix mutex wrong acquire 
Wrong acquire/release sequence.

 DEBUG_LOCKS_WARN_ON(rt_mutex_owner(lock) != current)
 ....
 CPU: 4 PID: 5404 Comm: cyclictest.sh Not tainted 4.9.201-rt134-tegra #1
 Hardware name: Jetson-AGX (DT)
 ....
 Call trace:
 [<ffffff800810e4f8>] debug_rt_mutex_unlock+0x58/0x68
 [<ffffff8008f34d0c>] rt_mutex_unlock+0x4c/0xb0
 [<ffffff8008f36ea8>] _mutex_unlock+0x20/0x2c
 [<ffffff8000f69d80>] nvgpu_cg_elcg_set_elcg_enabled+0x78/0xf0 [nvgpu]
 [<ffffff8000f7bd44>] nvgpu_intr_nonstall_cb+0x21bc/0x22f0 [nvgpu]
 [<ffffff800875b304>] dev_attr_store+0x44/0x60
 [<ffffff80082dca44>] sysfs_kf_write+0x5c/0x78
 [<ffffff80082dbd28>] kernfs_fop_write+0xc0/0x1d8
 [<ffffff8008245b60>] __vfs_write+0x48/0x128
 [<ffffff8008246b3c>] vfs_write+0xac/0x1b8
 [<ffffff800824808c>] SyS_write+0x5c/0xc8

Bug 3227296

Suggested-by: Bibek Basu <bbasu@nvidia.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Change-Id: I932a23700539422c07de045dde516c52dd8348cf
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2472903
(cherry picked from commit 535e9b1dd7)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2487498
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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 2021-03-15 14:40:19 -07:00
Antony Clince Alex
7072b39783 gpu: nvgpu: gv11b: update prop hww handling 
Update prop hww handling to read and print additional diagnostic
registers.

Generate following registers:
- gr_gpc0_prop_hww_esr_coord_r
- gr_gpc0_prop_hww_esr_format_r
- gr_gpc0_prop_hww_esr_state_r
- gr_gpc0_prop_hww_esr_state2_r
- gr_gpc0_prop_hww_esr_offset_r

Rename following registers and associated fields:
- pes_hww_esr => gpc0_ppc0_pes_hww_esr
- setup_hww_esr = > gpc0_setup_hww_esr
- zcull_hww_esr => gpc0_zcull_hww_esr
- prop_hww_esr => gpc0_prop_hww_esr

Jira NVGPU-6078
Bug 2865015

Change-Id: I131c48d2375ef0a76ac6c57ff1eb019f7c113286
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2472894
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2021-03-12 04:38:04 -08:00
Antony Clince Alex
f41e5975d8 gpu: nvgpu: add ioctl to configure l2 max_ways_evict_last 
Add ioctl support to configure and read the max number of lines/ways
in a L2 cache set that can be marked as EVICT_LAST. This is accomplished
through two new ltc hals: set_l2_max_ways_evict_last,
get_l2_max_ways_evict_last. These hals will only be set for nvgpu-next
chips. Incase of legacy chips, the IOCTLs will return error -ENOSYS.

Generate following litter constants to get the number of sets in a l2
slice and the number of ways in each set:
- GPU_LIT_NUM_LTC_LTS_SETS
- GPU_LIT_NUM_LTC_LTS_WAYS

Add gpu characteritics flag: NVGPU_L2_MAX_WAYS_EVICT_LAST_ENABLED to
allow userspace driver to determine if L2_MAX_WAYS_EVICT_LAST ioctl is
supported.

Bug 200605474

Change-Id: Id3180f891399f5e128500f3835d762aee59953e0
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2445884
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 2021-03-12 04:36:22 -08:00
Prateek sethi
fe03443161 gpu: nvgpu: replace hardcoded subscript with macro 
size of syncpt_name is hardcoded. Patch replaces hardcoded value with
macro.

Jira NVGPU-6371

Change-Id: I7a025f8f3687e104f61e0305096ac9e48d245a48
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2485732
(cherry picked from commit 6e373be0c5377b7c251787caa79934db9a389e70)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2493073
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2021-03-09 04:46:44 -08:00
shashank singh
1d86da257b gpu: nvgpu: fix some assertion/nvgpu_safe* APIs call in devctl path 
Fix following issues in devctl processing path
- Remove assertion for kind>=0. It is already checked in function
  nvgpu_vm_do_map.
- Check for possible overflow of map_addr and mapping size without using
  nvgpu_safe* API for NVGPU_AS_DEVCTL_MAP_BUFFER_EX and
  NVGPU_AS_DEVCTL_ALLOC_SPACE devctl.

Jira NVGPU-6496

Change-Id: I569c89d50900100f57bc9727fd032d6cd2c331e4
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2487550
(cherry picked from commit 6d340d7e73ba8e031f50679991d259daa682a006)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2492291
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2021-03-05 19:39:57 -08:00
shashank singh
b91f57d933 gpu: nvgpu: remove assert in devctl processing path 
Asserting in the path of devctl processing is not safe here because
incompr_kind can be passed out of range by a malicious app and it will
cause nvgpu-rm to crash. Instead return error in case of out of range
value.

Jira NVGPU-6496

Change-Id: I9c3264776110f606a67f27ce7b01fdce82aa3021
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2485752
(cherry picked from commit 689054d65fff2c61b9f1d413eef4a44a5f27fc54)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2492290
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 2021-03-05 19:39:46 -08:00
Vedashree Vidwans
625d942c52 gpu: nvgpu: update gops_fifo.intr_1_isr logic 
Update gops_fifo.intr_1_isr to clear interrupt and return
NVGPU_NONSTALL_OPS_WAKEUP_SEMAPHORE only if channel interrupt is pending

Jira NVGPU-6222

Change-Id: I976f8bcf53c7735b154f40bb70b5f401020c8dd4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2479250
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2021-03-05 01:27:39 -08:00
Vedashree Vidwans
3b6eb25668 gpu: nvgpu: update common.ce doxygen comments 
- Update function documentation
- Rename test_setup_env and test_free_env to test_ce_setup_env and
test_ce_free_env respectively. This will make sure that ce test has
independent setup and free functions.
- Add doxygen comments for nonstall workqueue operations in mc.

Jira NVGPU-6249

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Change-Id: I451d7b77e9a4f60fa30a9de640d423199c1a206c
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2459666
(cherry picked from commit b367d3d0ea7f92b722aebdc8cf6018979fe74c47)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480584
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-04 11:04:25 -08:00
Vedashree Vidwans
0477ce539a gpu: nvgpu: add variable range common.mc doxygen 
Update common.mc API doxygen comments to add input variable ranges.

Jira NVGPU-6240

Change-Id: I512cf3a6975e745fc28b50048513a1cfe3f0b0ee
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
(cherry-picked from commit 63c1be64f4d2c07e0b5c447914bc21e827bf6d76)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2482060
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2021-03-04 11:04:20 -08:00
Vedashree Vidwans
26fc64fb0b gpu: nvgpu: update common.mc function and docs 
- Update documentation for common.mc and gops_mc functions.
- Rename test_setup_env and test_free_env to test_mc_setup_env and
test_mc_free_env respectively. This will make sure that mc test has
independent setup and free functions.
- Add doxygen comments for mc.enable and mc.disable.
- Modify MC unit test description.

Jira NVGPU-6240

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Change-Id: I87291ee5f90b8e3c29c475c00a78c7855de5740e
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457183
(cherry picked from commit c62ff36f87878a8a7513bef06e111117d96c61c8)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480602
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2021-03-04 11:04:15 -08:00
ajesh
d1e836f059 gpu: nvgpu: Fix MISRA violations in Posix 
Fix violations of MISRA Rule 21.2 in Posix unit.

JIRA NVGPU-6533

Change-Id: I21bb6c4c18f7a904d639bf210bcd3d29f37d69bd
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2486766
GVS: Gerrit_Virtual_Submit
(cherry picked from commit 5239352b4acbe29a7cdb39821e68a717b132d2c9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2491861
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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 2021-03-04 00:37:20 -08:00
ajesh
0030dc3eb4 gpu: nvgpu: fix MISRA violations in Posix unit 
Fix violations of MISRA rule 5.4 in Posix unit.

JIRA NVGPU-6534

Change-Id: I9471e5fca913ca8cc19403998fdbe5450fb49879
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2488184
(cherry picked from commit f9bc21ca8d96e9c531a1b0077cfe1e78502e7ee5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2491855
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 2021-03-04 00:37:15 -08:00
Thomas Steinle
1b5a9b28ea gpu: nvgpu: Add gr.ops NULL-ptr check 
This fix add NULL-ptr checks for some of the user-accessible
ioctl.

Bug 3240771
Bug 200696704

Change-Id: Ibe7f75b31b2521a530883253a93ba832f010dc80
Signed-off-by: Thomas Steinle <tsteinle@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2483635
(cherry picked from commit cc717e3145)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2490126
Tested-by: Dinesh T <dt@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2021-03-04 00:36:14 -08:00
Deepak Nibade
53cc5be723 gpu: nvgpu: update doxygen for common.gr unit 
Update common.gr doxygen based on review comments from design
verification.
- Add error return values to some APIs.
- Remove redundant description lines from some APIs.

Update gm20b_gr_falcon_status_check_ctx_wait_ucode() to return
actual error codes instead of -1.

Jira NVGPU-6494

Change-Id: Ieb3f5acd27c30cd50049b114ddd8847b1b376ca3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2490213
(cherry picked from commit 3694fd1bdd1ac36f8c91b1fbaab47cadd8ba1868)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2490211
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2021-03-02 19:34:13 -08:00
Vedashree Vidwans
4cc99d035d gpu: nvgpu: update doxygen for common.fifo 
- Add doxygen comments for nvgpu_tsg_open_common().
- Update return and return value description for
1.	nvgpu_fifo_init_support()
2.	nvgpu_fifo_setup_sw()
3.	nvgpu_fifo_setup_sw_common()
4.	nvgpu_channel_init_support()
5.	gops_fifo.reset_enable_hw()
6.	nvgpu_runlist_get_runlists_mask()

Jira NVGPU-6222

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Change-Id: I2ef150d41695afca303f1e083f559d31895ba602
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2482062
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-02 19:31:37 -08:00
Vedashree Vidwans
f4e750cfb2 gpu: nvgpu: name nvgpu_fifo internal structures 
Add names for internal structures in nvgpu_fifo struct. This will clear
"anonymous" struct names from doxygen.

Jira NVGPU-6179

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Change-Id: I9c34ff5e0626a3b28febe7d0cfdb297eb6785427
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2467531
(cherry picked from commit 82a6fdd73fbca1e65315a5e13bcd0fd4311da583)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480573
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-02 19:31:32 -08:00
Vedashree Vidwans
4de7b8bbd1 gpu: nvgpu: update doxygen for common.fifo 
Modify doxygen comments
- to add more information
- correct spelling mistakes
- update formatting

Jira NVGPU-6179

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Change-Id: If0a075b8875c8f5aee1d9710e7348e843a457534
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2467530
(cherry picked from commit b367d3d0ea7f92b722aebdc8cf6018979fe74c47)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480583
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-02 19:31:25 -08:00
Vedashree Vidwans
12bbff3f5a gpu: nvgpu: update doxygen for common.fifo 
Update function return and return value description for
nvgpu_channel_open_new and nvgpu_engine_setup_sw as per review comments.

Jira NVGPU-6179

Change-Id: Ie9a9c7c3918f22071173ca8b51dee49f3e405df6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2471070
(cherry picked from commit cb8ac4e09f3a4803e967987afa2c55d78235149d)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480565
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-02 19:31:20 -08:00
Deepak Nibade
4ab8c87974 gpu: nvgpu: expose V2 device node hierarchy 
Nvgpu will move to new V2 device node hierarchy by default to be
consistent with MIG mode hierarchy. As part of this, expose V2 device
node hierarchy with this patch.

Both legacy and V2 hierarchies will co-exist for some duration until
V2 hierarchy is well tested out, and then legacy hierarchy will be
removed.

With V2 hierarchy, below is the directory structure for dev nodes :
igpu: /dev/nvgpu/igpu0/<dev_node>
dgpu: /dev/nvgpu/dgpu-0001\:01\:00.0/<dev_node>

Jira NVGPU-5648

Change-Id: I1c7a1c41e6d59fb248bc98a145c5ecebd06e8bad
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2443712
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-02 19:30:59 -08:00
Seshendra Gadagottu
ca636eaeb7 gpu: nvgpu: gops: mc: add doxygen for ltc_isr 
Add doxygen for mc.ltc_isr, since it is getting called
from fusa code.

Jira NVGPU-6182

Change-Id: I1995cb6a2caef11f0b982b76b5dcd8d809d78a44
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
(cherry picked from commit 8ddc5e9dbbe7d711baafe1e824111010fcc969fb)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2488417
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2021-03-01 22:15:35 -08:00
Seshendra Gadagottu
d6b49345cd gpu: nvgpu: init: nvgpu_check_gpu_state description update 
Update nvgpu_check_gpu_state function description to
reflect it's functionality.

Jira NVGPU-6182

Change-Id: I650098b04e5134cfcada37a99fbe505f3f621855
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
(cherry picked from commit c972d2925bf020270179abc0545335cbdc69113e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2488415
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2021-03-01 22:15:29 -08:00