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Author SHA1 Message Date
Deepak Nibade
10fae67c21 gpu: nvgpu: add flag for debugger fields in struct gk20a 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific fields in struct
gk20a

Jira NVGPU-3506

Change-Id: Icfae87e16e0079a2c5f16714b8a8ced7c6572cd4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137254
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:39:10 -07:00
Deepak Nibade
67350e2c9c gpu: nvgpu: add flags to debugger specific headers 
Add debugger/cyclestats/fecs_trace compile time flags to debugger
specific unit headers

Jira NVGPU-3506

Change-Id: Iedea5f274243a389dce91edecbc80c58753d4805
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137253
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:38:54 -07:00
Deepak Nibade
064f7a2f13 gpu: nvgpu: add debugger flag for netlist units 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.netlist and common.sim.netlist units

Jira NVGPU-3506

Change-Id: I616eaea58e72ff104fef11140a0daa59afe7b5fb
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137252
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:38:39 -07:00
Deepak Nibade
27a133aa4c gpu: nvgpu: add debugger flag for common.hal.ltc unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.hal.ltc unit

Jira NVGPU-3506

Change-Id: I7a330cc60ea90e6b76bd1f783bcecd649032e279
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137251
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:38:28 -07:00
Rajesh Devaraj
ab70c2e80f gpu: nvgpu: report class/method related errors 
This patch adds support to report class/method related errors to 3LSS.
Specifically, it adds the following service ID:
NVGUARD_SERVICE_IGPU_PGRAPH_SWERR_ILLEGAL_ERROR

JIRA NVGPU-3458
JIRA NVGPU-3461

Change-Id: I9b28ed3074f664254347e059ac699470f95610b3
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136301
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:37:43 -07:00
Sagar Kamble
b7061a3263 gpu: nvgpu: compile out changes for dgpu falcons 
SW handling of dgpu falcons GSPLITE, NVDEC, SEC2, MINION needs to be
compiled out in the igpu safety build. Also compile out gp106 falcon
and nvdec sources.

JIRA NVGPU-3539

Change-Id: If4d21cec151b6c00f944457dc6cae4f457043b04
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137226
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 23:16:00 -07:00
Divya Singhatwaria
203120deed gpu: nvgpu: Fix CERTC INT31-C violations in ACR 
CERT-C INT31 requires checking before casting from
"bool" to "unsigned int", "unsigned long" to "unsigned int"
otherwise it may result in lost or misinterpreted data.
This fixes INT31 violations in acr_blob_construct_v1.c

JIRA NVGPU-3575

Change-Id: I6da67a64758974f9fd04facac358a59782168470
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136255
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 22:15:35 -07:00
Nicolas Benech
6fb619aa30 gpu: nvgpu: unit: stage some nvgpu_channel tests 
The nvgpu_channel.setup_bind and enable_disable_tsg are causing
intermittent crashes in GVS, so stage them for now. Due to the
dependencies of the test functions, they just returns SUCCESS for now
(instead of disabling them entirely)

JIRA NVGPU-3640

Change-Id: I546b07b4633198f1a2c56e59e11eaa3355b1b285
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136820
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 11:39:37 -07:00
ajesh
b05a529219 gpu: nvgpu: Add safe ops for s64 
Add safe addition and multiplication functions for s64.

Jira NVGPU-3607

Change-Id: I8078679ee906dfcfcdab24ca221ec4e6b27e58db
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133656
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 04:06:25 -07:00
Vedashree Vidwans
6f37ac5de2 gpu: nvgpu: Disable logging for safety build 
This patch adds a conditional flag to filter out logging functions from
safety release build. Logging functions are replaced with stubs.

Jira NVGPU-869

Change-Id: If898b9ce8edb260727df28b407df83f0a92f61ad
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109509
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 00:16:03 -07:00
Adeel Raza
d8b2e22de9 gpu: nvgpu: unit: set fixed offset flag for VM tests 
Set the NVGPU_VM_MAP_FIXED_OFFSET flag when GPU VA is fixed.

JIRA NVGPU-3631

Change-Id: I8b0cc79e19367e2c729bc7d0744fd08d7c81e6c2
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135433
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-16 20:44:54 -07:00
Nicolas Benech
f09d19d5a3 gpu: nvgpu: unit: force gcov.sh to use a single thread 
On some host OSes, the OS may allocate virtual addresses that are
larger than can be handled by NVGPU. As a workaround, we noticed
that the host OS will not allocate such large addresses when
running single threaded. There is no other way to prevent this
issue nor is there any guarantee that this workaround will always
work...

JIRA NVGPU-1246

Change-Id: I8c89cf6be9f80bd6fb18fd1688037b9144d2d21c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135370
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 17:36:34 -07:00
Seema Khowala
93e7bb67b5 gpu: nvgpu: Add doxygen documentation in engine_status.h 
JIRA NVGPU-3590

Change-Id: I91eb1df2b19923dd008b613e831b7143bca333d4
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133735
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 11:27:58 -07:00
Seema Khowala
f3518ec5da gpu: nvgpu: Add doxygen documentation in pbdma_status.h 
JIRA NVGPU-3592

Change-Id: I8ac6d79327b2c11cf68ca052bc8f9d4fd078564a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131132
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 11:27:48 -07:00
Seema Khowala
4a2188e34e gpu: nvgpu: set channel to serviceable after it is bound to tsg 
Channel's unserviceable status should to set to false only
after channel is bound to tsg.

Bug 200460037

Change-Id: I24976c673b3b08cc652d2c203b9fc1f3aaed403f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135898
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 10:16:55 -07:00
Divya Singhatwaria
8948c91719 gpu: nvgpu: Fix MISRA violations in PMU unit 
- Rule 17.7 states that the value returned by a
  function having non-void return type shall be
  used.
- Add NVGPU_FEATURE_LS_PMU to compile out headers
  in pmu_gv11b.h to fix MISRA violation 8.6

JIRA NVGPU-3570

Change-Id: I6ab104aa72d8fd6419bd336c45e9055a40ba5a7e
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131420
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 09:06:06 -07:00
Abdul Salam
7e8d0c2bb1 gpu: nvgpu: Move from TSENSE to TSOSC for TU104 
In TU104 tsense is not calibrated and tsosc needs to be used.
Tsosc is the POR for TU104.
This patch does the following
Remove the GP106 related thermal header and Add TU104 therm.
Rename the files from therm_gp106 to therm_tu104.
Update the debug fs interface to reflect the same.
Update the yaml files.

Bug 200526122

Change-Id: I73fd7d4c516426b5c6b84762480be2d6d572d5a7
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135139
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 23:05:43 -07:00
Thomas Fleury
fcc66f9b90 gpu: nvgpu: Add doxygen documentation in pbdma.h 
Add doxygen documentations in pbdma.h and also take
care of setting pbdma_id to invalid value in case of
failure in nvgpu_pbdma_find_for_runlist.

Jira NVGPU-3591

Change-Id: I7aa7d55442cc7585c08fd6a54411cb22bc06ba30
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131913
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 15:34:57 -07:00
Nicolas Benech
1deb1fa176 gpu: nvgpu: unit: bitmap_allocator: fix init crashes 
While fixing CERT-C issues in the bitmap_allocator, a number of
asserts were added. In particular, if blk_size is 0 it will cause
a BUG(). Within the bitmap_allocator unit test, the init will try
to set blk_size to 0 to make sure it fails. Now the failure is a
BUG(), not a return code. So this fix adds EXPECT_BUG where needed.

JIRA NVGPU-906

Change-Id: I62ae725e494a7cf561ac8cac7685cffbbc8de38e
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135823
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 13:16:12 -07:00
Seshendra Gadagottu
344eceb739 gpu: nvgpu: fix CERT-C issues in ltc intr driver 
Use nvgpu_safe_add_u32 for u32 additions in ltc interrupt
driver.

JIRA NVGPU-3623

Change-Id: If4d1b126836c5980e7016ed42b588b435f4f7f66
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135322
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 13:15:27 -07:00
Alex Waterman
466592e639 gpu: nvgpu: Remove understand script 
This script has been copied over to the core-private directory.

Change-Id: Ied64f0d1722d61e207147508d28859b5c693a743
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131030
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 13:14:51 -07:00
Vinod G
c85d4c9e7f gpu: nvgpu: remove ZBC_STENCIL support for safety build 
Add CONFIG_NVGPU_GRAPHICS flag to enable the NVGPU_SUPPORT_ZBC_STENCIL
support.

Jira NVGPU-3580

Change-Id: I630430d5f2cca4a1230bdfe99e46346573030232
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135369
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:07:22 -07:00
Deepak Nibade
a3d30adab2 gpu: nvgpu: add debugger flag for fb units 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.hal.fb unit

Jira NVGPU-3506

Change-Id: If459e623e73ce716088d9cb92c31864c26fe0d3d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132260
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:06:30 -07:00
Deepak Nibade
1112af9f8c gpu: nvgpu: add flag for global fecs trace buffer index 
Add compile time flag check CONFIG_NVGPU_FECS_TRACE for
NVGPU_GR_GLOBAL_CTX_FECS_TRACE_BUFFER

Also add the flag check for setting NVGPU_FECS_TRACE_* characteristics
flag

Jira NVGPU-3506

Change-Id: I57f1538c852834b9be075a7b56b79fd699c04024
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132259
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:06:14 -07:00
Deepak Nibade
436549b9bf gpu: nvgpu: add cilp flag for CILP support 
Add CONFIG_NVGPU_CILP flag for CILP support across all the units

Jira NVGPU-3506

Change-Id: I0c71d38f9db6f00599a5070a8cb9d75d5b5fc351
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132258
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:59 -07:00
Deepak Nibade
4ac27a24bb gpu: nvgpu: add debugger flag for gr.utils unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.gr.utils unit.

Jira NVGPU-3506

Change-Id: Iea551df287e06602949b3c2c33ebe565f0a0c921
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132257
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:44 -07:00
Deepak Nibade
6ac3fc30c7 gpu: nvgpu: add debugger flag for gr.ctx unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.gr.ctx unit.

Jira NVGPU-3506

Change-Id: I42becd6404eb12b39dca7815849425128e7e42d8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132256
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:34 -07:00
Deepak Nibade
1792e6b820 gpu: nvgpu: add debugger flag for gr.global_ctx unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.gr.global_ctx unit.

Jira NVGPU-3506

Change-Id: I9baf468c17b9c6a2a64275ac191242fa8e01b0e1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132255
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:24 -07:00
Deepak Nibade
1239bf67a5 gpu: nvgpu: add debugger flag for hal.gr.ctxsw_prog unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
hal.gr.ctxsw_prog unit
Also add this flag for PM context allocation/free

Jira NVGPU-3506

Change-Id: Ib40569c7617b8b8aa3343fc89f3d8f30b1d21aa6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132254
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:14 -07:00
Sagar Kamble
556ddaf9a3 gpu: nvgpu: add support for removing comptags and cbc from safety build 
Safety build does not support compression. This patch adds support to
compile out compression related changes - comptags, cbc.

JIRA NVGPU-3532

Change-Id: I20e4ca7df46ceec175b903a6a62dff141140e787
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2125473
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 10:55:27 -07:00
Deepak Nibade
840972c1cc gpu: nvgpu: update TU104 regops whitelist 
List of whitelisted registers is auto generated with script

Bug 200526741

Change-Id: I097f4638ce9c1498ae09cfea2dbc7386fc5e0004
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135669
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 09:35:55 -07:00
Abdul Salam
ebeeec68ed gpu: nvgpu: Add support to query dgpu max freq 
Implement get_maxrate for TU104.
This function will use the clk_arb to get the P0 Max from VBIOS.

Bug 2610308

Change-Id: I09c692676bf949f300c9edd00f4faa26118b124f
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133427
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 07:39:59 -07:00
Shashank Singh
627a933da5 gpu: nvgpu: Unify posix sort unit with qnx 
-Unify sort function with qnx as qsort is posix compliant.
-Update yaml accordingly.

Jira NVGPU-3625

Change-Id: I982570bccb3bc8720596bfacf48eb17a0fca2ddf
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134355
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 06:42:07 -07:00
Kary Jin
03db4f8f33 gpu: nvgpu: add check for "vm->num_user_mapped_buffers" 
The "nvgpu_big_zalloc()" will be failed if the passed-in argument
"vm->num_user_mapped_buffers" is zero. The returned value is 16
which will bypass the NULL-check and then causes the panic.

This patch adds a check on the "vm->num_user_mapped_buffers" to
avoid the zero is passed-in the "nvgpu_big_zalloc()".

Bug 2603292

Change-Id: I399eecf72a288e13992730651a34a6cea1ef56d1
Signed-off-by: Kary Jin <karyj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123499
(cherry picked from commit fea9e05454)
Reviewed-on: https://git-master.nvidia.com/r/2130001
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 01:56:02 -07:00
Seshendra Gadagottu
5943f5fc9d gpu: nvgpu: fix CERT EXP34-C in common.gr.falcon 
Fixed CERT EXP34-C error in gr_falcon driver by checking for valid
nvgpu_firmware pointer, before calling nvgpu_release_firmware.

JIRA NVGPU-3622

Change-Id: Ief4973ce4b73aa5348460632693d18e6104eda47
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134674
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 22:19:11 -07:00
Seshendra Gadagottu
b2ed105fe5 gpu: nvgpu: fix CERT-C errors in common.gr.falcon 
Used nvgpu_safe_mult_u32 function for u32 multiplications to avoid
CERT INT 30-C errors.

JIRA NVGPU-3622

Change-Id: Id945910a586c00be0f0cdad941b17023db66b23b
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134621
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 22:18:55 -07:00
Vinod G
6110bcf586 gpu: nvgpu: Fix MISRA 17.7 errors in gr.intr unit 
Fix MISRA 17.7 errors in gr.intr unit
misra_c_2012_rule_17_7_violation: The return value of a non-void
function is unused.

Jira NVGPU-3621

Change-Id: I7b03b8165a628decce66bf886625fe001db76a01
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134530
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 20:56:57 -07:00
Vinod G
448eed1da6 gpu: nvgpu: Fix MISRA 21.1 error in defaults.h 
Fix MISRA 21.1 error in defaults.h
misra_c_2012_rule_21_1_violation: Defining or
undefining a reserved name.

Jira NVGPU-3621

Change-Id: I6f15a260c5f72fa9401147e97904ee462965e141
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134617
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:17:15 -07:00
Vinod G
a9fce07d11 gpu: nvgpu: Fix MISRA 13.2 errors in hal.gr.intr 
Fix MISRA 13.2 errors in hal.gr.intr unit.
misra_c_2012_rule_13_2_voilation: In hi32_lo32_to_u64, two function
calls in the arguments for which the order of evaluation is undefined.

Jira NVGPU-3621

Change-Id: I2c0d9a4492068f13edfb6ac6309f8679d1fbcee4
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134597
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:17:06 -07:00
Seshendra Gadagottu
fd2fb6dbc7 gpu: nvgpu: add gr utils function for simple checksum 
Added following gr utils function for simple u32 checksum:
static inline u32 nvgpu_gr_checksum_u32(u32 a, u32 b)
{
	return (u32)(((u64)a + (u64)b) % (U32_MAX));
}

JIRA NVGPU-3622

Change-Id: I9798fd3b21750c34a040639c7793e65123935d41
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133795
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:16:42 -07:00
Seshendra Gadagottu
d17b2b9622 gpu: nvgpu: fix CERT INT30-C in hal.gr.falcon 
Fixed CERT C error with following lines by using nvgpu_safe_add_u32:
tag++; --> tag = nvgpu_safe_add_u32(tag, 1U);

Fixed CERT C error with following lines by nvgpu_gr_checksum_u32:
checksum += ucode_u32_data[i]; -->
		checksum = nvgpu_gr_checksum_u32(checksum, ucode_u32_data[i]);

JIRA NVGPU-3622

Change-Id: Id8808365990033e3527605b989b63a4f6d2826f9
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132548
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:16:33 -07:00
Philip Elcan
6c1f0177ac gpu: nvgpu: mm: fix CERT-C INT30 violations in bitmap_allocator 
CERT-C INT30 requires checking for wrapping when doing arithmetic of
unsigned value. This fixes INT30 violations in bitmap_allocator.c

JIRA NVGPU-3587

Change-Id: I68dbe4ba77c668cc02e6a41a2bc1e01625eb4a8c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132541
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:16:23 -07:00
Philip Elcan
ca96903881 gpu: nvgpu: posix: make BITS_TO_LONGS CERT-C friendly 
Fix CERT-C INT30 violations caused by BIT_TO_LONGS() macro in bitops.h.

JIRA NVGPU-3587

Change-Id: Idadd0c719160fe4bc54c80c0e26890d3f1256c94
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132540
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:16:14 -07:00
Philip Elcan
d388e45d98 gpu: nvgpu: mm: fix CERT-C INT30 violations in mmu_fault 
Fix CERT-C INT30 violations in mmu_fault_gv11b.c. INT30 requires
checking for wrap when doing unsigned arithmetic. Use safe ops and
asserts to comply.

JIRA NVGPU-3628

Change-Id: I7f5024d1e95784e0ff3702c8da20e54233df468c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133799
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 14:17:05 -07:00
Philip Elcan
8f25fe41e2 gpu: nvgpu: mm: fix CERT-C STR30 violation in mmu_fault 
Fix CERT-C Rule STR30 violation for assigning string literal to
non-const pointer by changing the declaration.

JIRA NVGPU-3628

Change-Id: I804cf2e02c40b934a1575faa68a0cc3849927699
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133798
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 14:16:50 -07:00
Adeel Raza
f2dea4e8fc gpu: nvgpu: unit: add VM batch subtest 
Add a subtest to exercise the VM unit's batch mode. Batch mode is used
to optimize cache flushes.

JIRA NVGPU-3626

Change-Id: I4873d65f3fab48b11e998158669a26ad2e530dd1
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133881
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 12:14:37 -07:00
Thomas Fleury
4d6aafe280 gpu: nvgpu: unit: stub l2_flush for channel setup bind 
Stub g->ops.mm.l2_flush for channel setup bind, as calling HALs
is failing in GVS. This does not affect branch coverage for
this unit test.

Bug 2621189

Change-Id: I3a286f8d09456fe94c661d4be7140791a5ddca61
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134652
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 09:45:41 -07:00
Seshendra Gadagottu
bf68ff68f0 gpu: nvgpu: fix CERT-C errors in hal.ltc.intr driver 
Fixed CERT-C issues in hal ltc intr driver by replacing
arithmetic operations with nvgpu safe ops.

JIRA NVGPU-3623

Change-Id: I80c3dd9e42dd20bb853db6e60d6a1fd36415ab36
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134686
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 05:08:29 -07:00
Seshendra Gadagottu
330bf3ac2a gpu: nvgpu: fix CERT-C errors in hal ltc driver 
Fixed CERT-C issues in hal ltc driver by replacing
arithmetic operations with nvgpu safe ops.

JIRA NVGPU-3623

Change-Id: I05c9cf202b46c39997e77d006ac5930f5cee9cd7
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134685
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 05:08:19 -07:00
rmylavarapu
ebc0b3b381 gpu: nvgpu: Remove hardcoding related to Psate objs 
In P4 #25076323, we have done many hard codings in PMU
which are related to Pstate board objs. As we are sending
Pstate objs now we can remove those hardcoding in NVGPU.

NVGPU-3597

Change-Id: I8b35e6b34c71721bb84fde9ffc280cf748232dbf
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131350
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 00:46:42 -07:00