Commit Graph

221 Commits

Author SHA1 Message Date
Sunny He
907fcae638 gpu: nvgpu: Reorg bus HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the bus
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: If03303c34d91480d41fc29e66069efd43e970d75
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514660
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-23 23:35:04 -07:00
Sunny He
d717c69d2b gpu: nvgpu: Reorg css HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
css sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I3bf696e13d359982c964c7bc470500a30555c034
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514205
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-23 23:35:03 -07:00
Deepak Goyal
5364257c7f gpu : nvgpu: secure boot code unification.
This exposes all secure boot functions that can be
re-used by other chips. This is the first patch in
this series. Other pacthes will also follow.

JIRA NVGPU-60

Change-Id: I523637bbf601166f8a01ddf29a913e193d3fdc7a
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514567
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-07-18 11:04:23 -07:00
Sunny He
542ad000f2 gpu: nvgpu: Reorg debug HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch covers the debug
and dbg_session_ops sub-modules of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: Id51feeccbea91f884a6057efc680566a7d5d0b6d
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514822
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-13 00:09:09 -07:00
Sunny He
e78153ea1b gpu: nvgpu: Reorg mc HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the mc
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I26d74c14661a193af7e8d90dd672b73010e5f841
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1509601
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-13 00:09:08 -07:00
Sunny He
ecf67ebbf6 gpu: nvgpu: Reorg falcon HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
falcon sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: Ib1aaaa248b079bb591ccfada3382b689452de0e9
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514012
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-13 00:09:07 -07:00
Sunny He
858a204362 gpu: nvgpu: Reorg cde HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the cde
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I9343ce4985eb941a2610f5f11e8f01269ab68481
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master/r/1511673
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-07-07 10:35:24 -07:00
Sunny He
64076b4b21 gpu: nvgpu: Reorg misc HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch covers the lone
function pointers of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I30d379bf52709c8382c9d7aa87f1672ca0f89c6f
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master/r/1510386
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-07-06 10:54:57 -07:00
Seema Khowala
02d1e7ae97 gpu: nvgpu: add GPU_LIT_NUM_SM_PER_TPC litter value
Required for multiple SM support in t19x

JIRA GPUT19X-75

Change-Id: I14e19700849faf5180813e82179707a78eb977a5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1510358
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-29 13:28:53 -07:00
Sunny He
0dc80244ee gpu: nvgpu: Reorganize ltc HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the ltc
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I1110e301e57b502cf7f97e6739424cb33cc52a69
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master/r/1507564
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-27 10:44:11 -07:00
Deepak Nibade
6090a8a7ee gpu: nvgpu: move debugfs code to linux module
Since all debugfs code is Linux specific, remove
it from common code and move it to Linux module

Debugfs code is now divided into below
module specific files :

common/linux/debug.c
common/linux/debug_cde.c
common/linux/debug_ce.c
common/linux/debug_fifo.c
common/linux/debug_gr.c
common/linux/debug_mm.c
common/linux/debug_allocator.c
common/linux/debug_kmem.c
common/linux/debug_pmu.c
common/linux/debug_sched.c

Add corresponding header files for above modules too
And compile all of above files only if CONFIG_DEBUG_FS is set

Some more details of the changes made

- Move and rename gk20a/debug_gk20a.c to common/linux/debug.c
- Move and rename gk20a/debug_gk20a.h to include/nvgpu/debug.h

- Remove gm20b/debug_gm20b.c and gm20b/debug_gm20b.h and call
  gk20a_init_debug_ops() directly from gm20b_init_hal()

- Update all debug APIs to receive struct gk20a as parameter
  instead of receiving struct device pointer
- Update API gk20a_dmabuf_get_state() to receive struct gk20a
  pointer instead of struct device

- Include <nvgpu/debug.h> explicitly in all files where debug
  operations are used
- Remove "gk20a/platform_gk20a.h" include from HAL files
  which no longer need this include

- Add new API gk20a_debug_deinit() to deinitialize debugfs
  and call it from gk20a_remove()
- Move API gk20a_debug_dump_all_channel_status_ramfc() to
  gk20a/fifo_gk20a.c

Jira NVGPU-62

Change-Id: I076975d3d7f669bdbe9212fa33d98529377feeb6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1488902
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2017-06-02 06:53:35 -07:00
Alex Waterman
66a2511a36 gpu: nvgpu: Begin removing variables in struct gk20a
Begin removing all of the myriad flag variables in struct gk20a and
replace that with one API that checks for flags being enabled or
disabled. The API is as follows:

  bool nvgpu_is_enabled(struct gk20a *g, int flag);
  bool __nvgpu_set_enabled(struct gk20a *g, int flag, bool state);

These APIs allow many of the gk20a flags to be replaced by defines.
This makes flag usage consistent and saves a small amount of memory in
struct gk20a. Also it makes struct gk20a easier to read since there's
less clutter scattered through out.

JIRA NVGPU-84

Change-Id: I6525cecbe97c4e8379e5f53e29ef0b4dbd1a7fc2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1488049
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-30 13:24:35 -07:00
Sachin Nikam
4f0436de19 nvgpu: fix static sparse warnings
Fixed below static sparse warnings by making either
function as static or including right header.

- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/common/linux/module.c:816:5: warning: symbol 'gk20a_pm_init' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:28:6: warning: symbol 'gk20a_bus_init_hw' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:54:6: warning: symbol 'gk20a_bus_isr' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:90:5: warning: symbol 'gk20a_read_ptimer' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/bus_gk20a.c:147:6: warning: symbol 'gk20a_init_bus' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c:232:6: warning: symbol 'gk20a_init_ltc' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gk20a/fb_gk20a.c:75:6: warning: symbol 'gk20a_fb_debug_mode_enabled' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/hal_gm20b.c:184:5: warning: symbol 'gm20b_init_hal' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/fb_gm20b.c:165:5: warning: symbol 'gm20b_fb_vpr_info_fetch' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:103:5: warning: symbol 'gm20b_ltc_cbc_ctrl' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:168:6: warning: symbol 'gm20b_ltc_init_fs_state' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:195:6: warning: symbol 'gm20b_ltc_isr' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:221:5: warning: symbol 'gm20b_ltc_cbc_fix_config' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:236:6: warning: symbol 'gm20b_flush_ltc' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c:350:6: warning: symbol 'gm20b_init_ltc' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/tegra/linux/clk.c:72:6: warning: symbol 'nvgpu_linux_init_clk_support' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c:206:6: warning: symbol 'gp10b_init_ltc' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/fb_gp10b.c:98:6: warning: symbol 'gp10b_init_fb' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/hal_gp10b.c:190:5: warning: symbol 'gp10b_init_hal' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp10b/priv_ring_gp10b.c:79:6: warning: symbol 'gp10b_init_priv_ring' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp106/hal_gp106.c:222:5: warning: symbol 'gp106_init_hal' was not declared. Should it be static?
- $TOP/kernel/nvgpu/drivers/gpu/nvgpu/gp106/fb_gp106.c:42:6: warning: symbol 'gp106_init_fb' was not declared. Should it be static?

Bug 200299572

Change-Id: I32f9a3cb65314bd1eb1a6d93cda5796cfa64d738
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/1481804
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-16 02:32:35 -07:00
Terje Bergstrom
a8cf64019f gpu: nvgpu: Introduce priv ring HAL and define ISR
Introduce a priv ring HAL and define ISR as the only function in it.
Introduce a gp10b version of the ISR that writes error message to
UART for every priv ring error, and leave the old chips with silent
error handling.

Bug 1846641

Change-Id: I73e38396205ac7bb7b8488b7fbca3ff67a3db3bb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473696
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-12 10:19:52 -07:00
Terje Bergstrom
744e2d202e gpu: nvgpu: Add flag gk20a->is_virtual
Instead of calling gk20a_gpu_is_virtual() which requires struct
device pointer fill in flag gk20a->is_virtual and use that.

JIRA NVGPU-16

Change-Id: I24382c041ee69940c703ca1ea7f5c667c5731cd1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1473707
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-04 15:54:30 -07:00
Mahantesh Kumbar
abbc687a31 gpu: nvgpu: init interface layer support for PMU falcon
Change-Id: I210267265fa38777115d5b49cc8f78f2599e3f9e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1469458
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-05-02 23:36:07 -07:00
Terje Bergstrom
6df49a63ca gpu: nvgpu: Move is_fmodel to struct gk20a
Copy is_fmodel to struct gk20a at probe time, and access it from
gk20a instead of platform_gk20a.

JIRA NVGPU-16

Change-Id: Ib8d793ea2b02b62da3bfdbb6372d9927658b7ec6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463540
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-04-19 13:24:30 -07:00
Terje Bergstrom
947a236063 gpu: nvgpu: gm20b: Use new delay APIs
Use platform agnostic delay functions instead of Linux kernel APIs.
This allows removing dependency to Linux header linux/delay.h. At the
same time remove #include lines for other unused Linux headers.

JIRA NVGPU-16

Change-Id: I05df9d72edaf4bb061febe0cb40fc8a7cf9f51c7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460114
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2017-04-13 13:44:41 -07:00
Terje Bergstrom
a0fa2b0258 gpu: nvgpu: Add wrapper nvgpu/bug.h
Add wrapper header file nvgpu/bug.h. It #includes <linux/bug.h>
in Linux.

JIRA NVGPU-13

Change-Id: I7bf02ba554333f7cbd79d72bd1cb423c81ebcb49
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1461545
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-04-13 08:56:06 -07:00
Terje Bergstrom
57d624f900 gpu: nvgpu: gp10b: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer,
which is not portable across operating systems. The new nvgpu_err()
and nvgpu_warn() macros take struct gk20a pointer. Convert code
to use the more portable macros.

JIRA NVGPU-16

Change-Id: I8dc0ddf3b6ea38af6300c27558b60786c163da6d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1457344
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-04-10 19:04:20 -07:00
Terje Bergstrom
f116320137 gpu: nvgpu: Add wrapper for linux/types.h
Add wrapper header nvgpu/types.h. It checks if build is for Linux
kernel and pulls in linux/types.h.

Delete also all #includes for linux/types.h which are not strictly
necessary, and change the remaining ones to use the new wrapper.

JIRA NVGPU-13

Change-Id: I1ddfef0b0b9d840e3e41a62f69c7cb9148d2d5fa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1453371
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-04-03 14:04:10 -07:00
Alex Waterman
dd88aed5cc gpu: nvgpu: Split out pramin code
Split out the pramin interface code in preparation for splitting
out the mem_desc code.

JIRA NVGPU-12

Change-Id: I3f03447ea213cc15669b0934fa706e7cb22599b7
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1323323
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-31 17:21:34 -07:00
Terje Bergstrom
3e39798997 gpu: nvgpu: Remove unnecessary use of dev_name()
Move the name field from struct gpu_ops up to struct gk20a. The field
is not a function op, so it doesn't belong in gpu_ops.

Replace all uses of dev_name() with use of g->name when possible.

JIRA NVGPU-16

Change-Id: Ic6e99e39258cbf3bb7c806962cbbd7de5126688f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1328534
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-28 12:05:03 -07:00
Terje Bergstrom
4492c62ffe gpu: nvgpu: Add bus HAL
Add bus HAL and move all bus related hardware sequencing to that file:
BAR1 binding, timer access, and interrupt handling.

Change-Id: Ibc5f5797dc338de10749b446a7bdbcae600fecb4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323353
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 08:44:07 -07:00
Terje Bergstrom
66cd2f7a18 gpu: nvgpu: gp10b: Remove checks for privsec on vgpu
In virtualized platform we don't have access to fuses. Skip reading
fuse and set priv security unconditionally.

Change-Id: Idcb2670ed48a5edb760e49a6d136d53e05bc34ef
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323283
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Tested-by: Richard Zhao <rizhao@nvidia.com>
2017-03-20 16:40:02 -07:00
Terje Bergstrom
589d6385b1 gpu: nvgpu: Implement get_rate/set_rate as GPU op
Move clock APIs from gk20a_platform to gpu_ops. At the same time
allow use of internal get_rate/set_rate for querying both GPCCLK
and PWRCLK on iGPU.

At the same time we can replace calls to clk framework with the
new HAL and drop direct dependency to clk framework.

gp10b ops were replaced as a whole at HAL initialization. That
replaces anything set in platform probe stage, so reduce that to
touch only clock gating regs.

Change-Id: Iaf219b1f000d362dbf397d45832f52d25463b31c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1300113
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-16 11:48:29 -07:00
Terje Bergstrom
95ef0315b9 gpu: nvgpu: Use GPU's own fuse registers
Read fuse values from GPU's own fuse registers instead of Tegra fuse
registers whenever possible. This reduces the number of dependencies
to Linux fuse code.

Some fuses do not have a corresponding register in GPU, so they're
left as is.

Change-Id: Id9f2f4da897f3e20b20c300a67f705e3fa5ba35a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1318278
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2017-03-16 09:17:22 -07:00
Laxman Dewangan
9e5208f634 drivers: gpu: nvgpu: Use soc/tegra/fuse.h for fuse header
The fuse headers are unified and moved all the content of
linux/tegra-fuse.h to the soc/tegra/fuse.h to have the
single fuse header for Tegra.

Use unified fuse header soc/tegra/fuse.h.

bug 200260692

Change-Id: Icab3ba5c3dbcd3fa831455c2f336942d356ff5ac
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1287498
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-19 00:04:59 -08:00
Alex Waterman
865514be2d gpu: nvgpu: Move gp10b HW headers
Move the gp10b HW headers to a new directory specially for them:

  include/nvgpu/hw/gp10b

And change the code to include like so:

  #include <nvgpu/hw/gp10b/hw_fb_gp10b.h>

This is part of the process to restructure the nvgpu driver.

Bug 1799159

Change-Id: Ic80ea5b7f5c280839e502e2178a345181f7a7ef9
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1280326
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-11 12:44:14 -08:00
Peter Daifuku
d8dc7b130e gpu: nvgpu: hardcode gp10b fbpa values
gp10b does not have an fbpa unit, although the
 hw header files claim it does. Hardcode all fbpa
 values to 0.

 Bug 200249125

Change-Id: I6ed63b3231d7af8e31ccf5047d56bdb85f05a9d9
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1256422
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:51 +05:30
Peter Daifuku
06a03fba26 gpu: nvgpu: add FBPA base addresses
Add FBPA base addresses

Bug 200249125

Change-Id: I235fa12a00ef2c5b2f0415bb18755523e8a2754b
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1247802
(cherry picked from commit d2c73ee989d3abeae305ff68ab355772c5e0af5a)
Reviewed-on: http://git-master/r/1252163
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:51 +05:30
seshendra Gadagottu
90fbd43cbe gpu: nvgpu: gp10x: updated API for get_litter_value
get_litter_value API is updated to use int instead of
enum type.

JIRA GV11B-21

Change-Id: I982fdfe372f4be38aa4ed026a23e936d73190e79
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1252212
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:51 +05:30
Shardar Shariff Md
3a032c33fb gpu: nvgpu: gp10b: define fuse macro depend on kernel version
- Define fuse macros depending on kernel version as fuse
  offset got changed in K4.4 and for K4.4 fuse defines are
  defined in common header file (tegra-fuse.h)
- Use fuse control read/write APIs when reading control
  registers for K4.4

Bug 200243956

Change-Id: I34dabd1a307d10010cb89ac6a5f1e3f5b177c0fc
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1245825
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:51 +05:30
Vijayakumar Subbu
432017248e gpu: nvgpu: Add dGPU clocks support
JIRA DNVGPU-42

Change-Id: Ic2fca9d0cf82f2823654ac5e8f0772a1eec7b3b5
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1205850
(cherry picked from commit b9f5c6bc4e649162d63e33d65b725872340ca114)
Reviewed-on: http://git-master/r/1227257
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:49 +05:30
Shardar Shariff Md
49840c15ef gpu: nvgpu: change the usage of tegra_fuse_readl
tegra_fuse_readl() prototype is changed to match upstreamed
fuse driver, so change implementation accordingly.

Bug 200233653

Change-Id: Ib690cf8a5a69e7b13146471a5ee211834dc40086
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1217376
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-12-27 15:26:19 +05:30
Peter Daifuku
a74a971f49 gpu: nvgpu: vgpu: cyclestat snapshot support
Add support for cyclestats snapshots in the virtual case

Bug 1700143
JIRA EVLR-278

Change-Id: I353efac6a17704c815a99745ac04d2c3d831351b
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1216644
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:19 +05:30
Peter Daifuku
0e1758a723 gpu: nvgpu: move dbg_session_ops to gops
Move dbg_session_ops to gops for better code consistency

JIRA VFND-1905

Change-Id: I0ac10a69194c8ca485f361cd8cea61d8ab72145a
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1192642
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2016-12-27 15:26:19 +05:30
Seema Khowala
436109f46d gpu: nvgpu: gp10b: add is_fmodel check
Check for is_fmodel instead of check
for simualtion platforms.

Bug 1735760

Change-Id: I14e349088e9414a73353a94613fa031e63bfa31f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1177200
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Ayoosh Bansal <ayooshb@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
2016-12-27 15:26:18 +05:30
Peter Daifuku
cb80b2315d gpu: nvgpu: ppc register support
Fix support for ppc_in_gpc_base
Add support for ppc_in_gpc_shared_base

Bug 1771830

Change-Id: Icb0bdedbe78ec4246426789e62302118682ed20a
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1158889
(cherry picked from commit 0f9ac2fd958556ee5d76d4cb2f6a335960227433)
Reviewed-on: http://git-master/r/1164398
(cherry picked from commit aa12f60061bdbeb68094d59258ac2db34f0cfe2a)
Reviewed-on: http://git-master/r/1181501
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-on: http://git-master/r/1189608
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-12-27 15:26:18 +05:30
Hoang Pham
a5fad1ec42 Revert "gpu: nvgpu: ppc register support"
This reverts commit 3639659575e76f81e31c5c9f3aca8896c4ebcb69.

Change-Id: Ieb6a40e30128bb9c59f64f6e39bb026de9a30397
Signed-off-by: Hoang Pham <hopham@nvidia.com>
Reviewed-on: http://git-master/r/1189599
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
Tested-by: Vladislav Buzov <vbuzov@nvidia.com>
2016-12-27 15:26:18 +05:30
Peter Daifuku
f61d819acc gpu: nvgpu: ppc register support
Fix support for ppc_in_gpc_base
Add support for ppc_in_gpc_shared_base

Bug 1771830

Change-Id: I1d04bfd20eac08a26986a2436524b97a008ed913
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1158889
(cherry picked from commit 0f9ac2fd958556ee5d76d4cb2f6a335960227433)
Reviewed-on: http://git-master/r/1164398
(cherry picked from commit aa12f60061bdbeb68094d59258ac2db34f0cfe2a)
Reviewed-on: http://git-master/r/1181501
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:18 +05:30
Richard Zhao
14e0681fe5 gpu: nvgpu: set gops.read_ptimer
Bug 1395833

Change-Id: I7e7f453d83db76a46f79d62f205832254fcf401e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1159589
(cherry picked from commit a1f43172ebf91066969c4d9e25b8a781edb20724)
Reviewed-on: http://git-master/r/1158898
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:17 +05:30
Lakshmanan M
9454529abe gpu: nvgpu: Add multiple engine and runlist support
This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt support for
   Pascal GPU series
5) Removed hard coded engine_id logic and
   made generic way
6) Code cleanup for readability

JIRA DNVGPU-26

Change-Id: Ibf46a89a5308c82f01040ffa979c5014b3206f8e
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1156022
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:17 +05:30
Richard Zhao
1e67de6e6e gpu: nvgpu: init tsg HAL ops
Bug 1702773

Change-Id: I9b6e1d0f2f4fe979f6fab83347884bd69413ccda
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1144935
(cherry picked from commit f79eb75272879c869b137cd042312db0a5953412)
Reviewed-on: http://git-master/r/1127031
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:16 +05:30
Terje Bergstrom
342d45e060 gpu: nvgpu: gp10b: Add litter values HAL
Move per-chip constants to be returned by a chip specific function.
Implement get_litter_value() for each chip.

Change-Id: I8bda9bf99b2cc6aba0fb88a69cc374e0a6abab6b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1121384
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2016-12-27 15:22:12 +05:30
Sami Kiminki
58adb7385d gpu: nvgpu: Determine ECC-enabled units for GP10B
Determine ECC-enabled units for GP10B by reading fuses/registers.

Bug 1637486

Change-Id: I6431709e3c405d6156dd96438df14d4054b48644
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/780992
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120463
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:11 +05:30
Thomas Fleury
f7872bec49 gpu: nvpgu: setup fecs_trace hal operations
bug 1648908

Change-Id: I630f74f09e0a4143f5028c88634b9793ec86b279
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1022730
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:11 +05:30
Seshendra Gadagottu
57a75c3ba6 gpu: nvgpu: gp10b: update prod setiings
Add/update following prod settings:
  blcg ce
  slcg ce2

Change-Id: I10a62d980479ad23efd7033d29e269c4aac08834
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1030986
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:11 +05:30
Seshendra Gadagottu
313fcdb1d3 gpu: nvgpu: gp10b: update thermal programming
Add required fileds and values for thermal slow-down
settings in thermal header file and corrected
thermal register programming with correct values.

Bug 1695567

Reviewed-on: http://git-master/r/822200
(cherry picked from commit 859d1bda6a059b321d859c887fab8d51d2caa981)

Change-Id: Id90ebd46bc3d6e4284a91e7f2b775d78502a3eca
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/823013
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:22:09 +05:30
Terje Bergstrom
4d3f44849b gpu: nvgpu: gp10b: Report Pascal DMA copy class
Announce supporting Pascal DMA copy class instead of Maxwell.

Change-Id: Ic0b9d50e7423648c5573857142c86b8a8bc87e35
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/808140
(cherry picked from commit c779975d6b40ecb0780ae4167ab26aed4886c7a7)
Reviewed-on: http://git-master/r/815679
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:08 +05:30